• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.27 no.9
• /
• pp.547-550
• /
• 2014

In this study, the electrical characteristics of the nickel (Ni)/carbon nanotube (CNT)/$SiO_2$ structures were investigated in order to analyze the mechanism of CNT in MOS device structures. We fabricated 4H-SiC MOS capacitors with or without CNTs. CNT was dispersed by isopropyl alcohol. The capacitance-voltage (C-V) and current-voltage (I-V) are characterized. Both devices were measured by Keithley 4200 SCS. The experimental flatband voltage ($V_{FB}$) shift was positive. Near-interface trap charge density ($N_{it}$) and negative oxide trap charge density ($N_{ox}$) value of CNT embedded MOS capacitors was less than that values of reference samples. Also, the leakage current of CNT embedded MOS capacitors is higher than reference samples. It has been found that its oxide quality is related to charge carriers and/or defect states in the interface of MOS capacitors.

• Proceedings of the KIEE Conference
• /
• 1998.11c
• /
• pp.737-739
• /
• 1998

Gate insulators using various fluoride films were investigated for thin film transistor applications. Conventional oxide containing materials exhibited high interface states, high $D_{it}$ gives an increased threshold voltage and poor stability of TFT. To improve TFT performances, we must reduce interface trap charge density between Si and gate insulator. In this paper, we investigated gate insulators such as such as $CaF_2$, $SrF_2$, $MgF_2$ and $BaF_2$. These materials exhibited an improvement in lattice mismatch, difference in thermal expansion coefficient, and electrical stability MIM and MIS devices were employed for an electrical characterization and structural property examination. Among the various fluoride materials, $CaF_2$ film showed an excellent lattice mismatch of 0.737%, breakdown electric field higher than 1.7MV/cm and leakage current density of $10^{-6}A/cm^2$. This paper probes a possibility of new gate insulator material for TFT application.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2011.02a
• /
• pp.314-314
• /
• 2011

Using first principles calculations, we investigated the interface structure effects on the magnetic properties of the Fe/BaTiO3 system. On the BaO-terminated surface, a Fe monolayer is formed as two Fe atoms are adsorbed on the top sites of Ba and O in the ($1{\times}1$) surface unit and a Fe ML is formed on the TiO2-terminated surface as two Fe atoms are adsorbed on the two O top sites. The magnetic anisotropy energy of Fe was higher on the TiO2?-erminated surface (1.5 eV) than on the BaO-terminated surface (0.5 eV). The decomposed electron density of the states showed that the stronger hybridization of Fe with the TiO2 layer than with the BaO layer is the most important reason for the higher magnetic anisotropy energy.

• Bulletin of the Korean Chemical Society
• /
• v.33 no.12
• /
• pp.4155-4160
• /
• 2012

We characterized the physisorption of p-iodo-phenyl octadecyl ether molecules (I-POE) onto superlattice regions of graphite surfaces using scanning tunneling microscopy (STM). The formation of self-organized I-POE monolayers does not affect the overall structures of moir$\acute{e}$ patterns and their modulation periods. However, the packing density of the I-POE monolayer and the orientations of lamella structures were sensitive to the underlying superlattice structure. Depending on the bias voltage, the STM images selectively showed moir$\acute{e}$ pattern, I-POE layer, or both. Reflecting the local density of states at a certain energy level, the STM images thereby revealed the relative energy level scale of the superlattice with respect to the molecular orbitals of I-POE.

• Journal of the Korean Crystal Growth and Crystal Technology
• /
• v.11 no.1
• /
• pp.38-42
• /
• 2001

Electric and dielectric(Ba,Sr)$TiO_3$[BST] thin films for emtal-Insulator-Semiconductor(MIS) capacitors have been studied. BST thin films wre deposted on p-Si(100) substrates bythe RF magnetron sputtering with tempratue range of 500~$600^{\circ}C$. The dielectric properties of MIS capacitors consisting of Al/BST/$SiO_2$/Si sandwich structure were evaluated ot redcue the leakage current density. The charge state densities of the MIS capacitors were determined by high frequency (1 MHz) C-V measurement. In order to reduce the leakage current in MIS capacitor, high quality $SiO_2$ layer was deposited on bare p-Si substrate. Depending on the oxygen pressure and substrate temperature both positive and negative polarities of effective oxide charge in the MIS capacitors were evaluated. It is considered that the density of electronic states, generated at the BST/$SiO_2$/p-Si interface due to the asymmetric structure within BST/$SiO_2$/Si structure, and the oxygen vacancy content has influence on the behavior of oxide charge.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.18 no.10
• /
• pp.896-901
• /
• 2005

The microstructure and electrical properties of praseodymium-based zinc oxide varistors were investigated at various cobalt oxide contents in the range of $0.5{\~}5.0 mol\%$. The ceramic density increased in the range of $5.25{\~}5.55 g/cm^3$ with increasing cobalt oxide content. The varistor doped with cobalt oxide of $1.0 mol\%$ exhibited the highest nonlinearity, with 66.6 in nonlinear exponent and 1.2 $\mu$A in leakage current. The donor concentration, density of interface states, and tamer height were in the range of $(1.06{\~}1.69){\times}10^{18}/cm^3$, $(3.11 {\~}3.56){\times}10^{12}/cm^2$, and 0.80${\~}$1.07 eV, respectively.

• Journal of the Korean Institute of Telematics and Electronics
• /
• v.26 no.7
• /
• pp.83-89
• /
• 1989

Ferroelectric $PbTiO_3$ thin film is deposited with rf sputtering at substrate temperature of $100-150^{\circ}C$. It is found that this has pyrochlore structure of amorphous type by X-ray diffractive analysis. Thermal annealing has excellent characteristics at $550^{\circ}C$ and laser annealing has best crystalline structure in case of scanning with 50 watts. Interface states in MFST and MFOST structure with a $PbTiO_3$ ferroelectric thin film gate have been investigated from analysis of C-V data. The interface states density has been drastically reduced by inserting an oxide layer between ferroelectric and semiconductor. The observed effect increase feasibility of employing ferroelectric thin films such as nonvolatile memory field effect transistor, IR optical FET, and Image Devices with a ferroelectric layer.

• Transactions on Electrical and Electronic Materials
• /
• v.17 no.1
• /
• pp.25-28
• /
• 2016

We investigate the effect of interface states on the endurance of a charge trap flash (CTF) NOR array using charge pumping methods. The endurance test was completed from one cell selected randomly from 128 bit cells, where the memory window value after 10² program/erase (P/E) cycles decreased slightly from 2.2 V to 1.7 V. However, the memory window closure abruptly accelerated after 10³ P/E cycles or more (i.e. 0.97 V or 0.7 V) due to a degraded programming speed. On the other hand, the interface trap density (Nit) gradually increased from 3.13×10¹¹ cm⁻² for the initial state to 4×10¹² cm⁻² for 10² P/E cycles. Over 10³ P/E cycles, the Nit increased dramatically from 5.51×10¹² cm⁻² for 10³ P/E cycles to 5.79×10¹² cm⁻² for 10⁴ P/E cycles due to tunnel oxide damages. These results show good correlation between the interface traps and endurance degradation of CTF devices in actual flash cell arrays.

• Journal of the Korean Magnetics Society
• /
• v.22 no.5
• /
• pp.157-161
• /
• 2012

Magnetism at the interfaces of rocksalt structured half-metals, NaN and CaN were investigated by use of the first-principles band calculations. The electronic structures for the simple interface and mixed interface systems were calculated by the FLAPW (full-potential linearized augmented plane wave) method. From the calculated number of electrons in muffin-tin spheres of each atom, we found, for the simple interface system, that the magnetic moment of the N atom in the CaN (NaN) side is increased (decreased) compared to those of inner N atoms. For the mixed interface system, the magnetic moments of the interface N atoms are similar to the averaged value for the inner N atoms in CaN and NaN side. Among four interface N atoms, the N atom connected to Na atoms in the upper and down layers has the largest magnetic moment and that connected to Ca atoms has the smallest. The number of p electrons in each N atom and the calculated density of states explain well the above situation.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2009.11a
• /
• pp.55-55
• /
• 2009

Silicon Carbide (SiC) is a material with a wide bandgap (3.26eV), a high critical electric field (~2.3MV/cm), a and a high bulk electron mobility (${\sim}900cm^2/Vs$). These electronic properties allow high breakdown voltage, high frequency, and high temperature operation compared to Silicon devices. Although various SiC DMOSFET structures have been reported so far for optimizing performances. the effect of channel dimension on the switching performance of SiC DMOSFETs has not been extensively examined. In this paper, we report the effect of the interface states ($Q_s$) on the transient characteristics of SiC DMOSFETs. The key design parameters for SiC DMOSFETs have been optimized and a physics-based two-dimensional (2-D) mixed device and circuit simulator by Silvaco Inc. has been used to understand the relationship with the switching characteristics. To investigate transient characteristic of the device, mixed-mode simulation has been performed, where the solution of the basic transport equations for the 2-D device structures is directly embedded into the solution procedure for the circuit equations. The result is a low-loss transient characteristic at low $Q_s$. Based on the simulation results, the DMOSFETs exhibit the turn-on time of 10ns at short channel and 9ns at without the interface charges. By reducing $SiO_2/SiC$ interface charge, power losses and switching time also decreases, primarily due to the lowered channel mobilities. As high density interface states can result in increased carrier trapping, or recombination centers or scattering sites. Therefore, the quality of $SiO_2/SiC$ interfaces is important for both static and transient properties of SiC MOSFET devices.