• 제목/요약/키워드: Delayed signal cancellation

검색결과 10건 처리시간 0.023초

무선 LAN 시스템에 적합한 효율적인 ISI 제거에 관한 연구 (A Study on Efficient ISI Cancellation in Wireless LAN System)

  • 임세홍;이인섭;고영욱;김환용
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2000년도 하계종합학술대회 논문집(1)
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    • pp.236-239
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    • 2000
  • OFDM Transmission system can effectively reduce ISI(Inter Symbol Interference) caused by multipath fading, especially in the case of broad band data transmission. Nevertheless, the delayed waves existing in a symbol degrade the transmission Performance at the receiver. Therefore when OFDM transmission system applies to mobile radio communication system, we have to remove the influence without intricacy. This paper proposes and design a new scheme in order to estimate propagation characteristics using the characteristics of distinctive OFDM signal which is inserted pilot signal periodically in frequency axis before IFFT at the transmitter Moreover, we introduce a cancellation scheme of delayed signal on the basis of the proposed estimation technique. Using these schemes, it is possible to estimate and cancel the Interference of the delayed signal before FFT at the receiver.

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A Quantitative Evaluation and Comparison of Harmonic Elimination Algorithms Based on Moving Average Filter and Delayed Signal Cancellation in Phase Synchronization Applications

  • Xiong, Liansong;Zhuo, Fang;Wang, Feng;Liu, Xiaokang;Zhu, Minghua;Yi, Hao
    • Journal of Power Electronics
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    • 제16권2호
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    • pp.717-730
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    • 2016
  • The harmonic components of grid voltage result in oscillations of the calculated phase obtained via phase synchronization. This affects the security and stability of grid-connected converters. Moving average filter, delayed signal cancellation and their related harmonic elimination algorithms are major methods for such issues. However, all of the existing methods have their limitations in dealing with multiple harmonics issues. Furthermore, few studies have focused on a comparison and evaluation of these algorithms to achieve optimal algorithm selections in specific applications. In this paper, these algorithms are quantitatively analyzed based on the derived mathematical models. Moreover, an enhanced moving average filter and enhanced delayed signal cancellation algorithms, which are applicable for eliminating a group of selective harmonics with only one calculation block, are proposed. On this basis, both a comprehensive comparison and a quantitative evaluation of all of the aforementioned algorithms are made from several aspects, including response speed, required data storage size, sensitivity to sampling frequency, and elimination of random noise and harmonics. With the conclusions derived in this paper, better overall performance in terms of harmonic elimination can be achieved. In addition, experimental results under different conditions demonstrate the validity of this study.

Delayed Parallel Interference Cancellation for GPS C/A Code Receivers

  • Glennon, Eamonn P.;Bryant, Roderick C.;Dempster, Andrew G.
    • 한국항해항만학회:학술대회논문집
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    • 한국항해항만학회 2006년도 International Symposium on GPS/GNSS Vol.2
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    • pp.261-266
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    • 2006
  • A number of different techniques are available to mitigate the problem of cross correlations caused by the limited dynamic range of the 10-bit Gold codes in the GPS C/A code. These techniques include successive-interference cancellation (SIC) and parallel-interference cancellation (PIC), where the strong signals are subtracted at IF prior to attempting to detect the weak signals. In this paper, a variation of these techniques is proposed whereby the subtraction process is delayed until after the correlation process, although still employing a pure reconstructed C/A code signal to permit prediction of the cross correlation process. The paper provides details on the method as well as showing the results obtained when the method was implemented using a software GPS receiver. The benefits of this approach are also described, as is the application of the method to the cancellation of CW interference.

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동일 군속도 지연 신호 상쇄기를 이용한 광대역 Feedforward증폭기 설계 (A Design of Ultra Wide-Band Feedforward Amplifier Using Equal Group-Delayed Signal Canceller)

  • 정용채;안달;김홍기;김철동;장익수
    • 한국전자파학회논문지
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    • 제16권8호
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    • pp.825-834
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    • 2005
  • 본 논문에서는 인가되는 두 입력 단자의 신호들을 동일 군속도를 가지게 하면서 신호 상쇄를 가능하게 하는 새로운 구조의 신호 상쇄기를 제안하였고, 이를 적용한 feedforward 전력 증폭기를 제작하였다. 종전의 신호 상쇄기는 동작 주파수 전 대역에서 위상 정합과 군속도 지연 정합을 동시에 만족시킬 수 없으나 제안된 동일 군속도 지연 신호 상쇄기는 위상 정합과 군속도 지연 정합을 동시에 만족시킬 수 있다. 위상과 군속도 지연 정합은 광대역 신호 상쇄를 가능하게 한다. 제안한 동일 군속도 지연 신호 상쇄기를 적용한 feedforward 전력 증폭기의 주 신호 제거 루프에서는 $2,140{\pm}100$ MHz 대역에서 26.3 dB 이상의 신호 상쇄를 얻었고, 혼변조 왜곡 신호 제거 루프에서는 15.2 dB 이상의 신호 상쇄를 얻었다. 또한 2,115 MHz와 2,165 MHz인 2-tone 신호를 인가하여 (C/I)를 20.8 dB 개선시켰다.

지연 추정 LMS 적응 알고리즘을 이용한 무선 중계 간섭 제거기 (Wireless Repeating Interference Canceller Using Delay Estimation Least Mean Square Adaptive Algorithm)

  • 강용진;송주태;전익태;김주완;하성희;반지훈;이종현
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2007년도 하계종합학술대회 논문집
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    • pp.119-120
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    • 2007
  • The operation of Interference cancellation algorithm for wireless repeater cancellation depends on either existing correlation properties between desired signal and reference signal or not At the time, due to the correlation properties at the ICS system, adaptive algorithms without considering system delay do not function properly. Thus, this system should be oscillated. In this paper, to solve these problems, we use the delayed least mean square algorithm. For the best performance of ICS, the system delays must be estimated. To efficiently estimate the delay of ICS, we use relations between bandwidth and correlation properties of the received signal.

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주파수 변동시 불평형 전압에 강인한 DSC-PLL 설계 연구 (The Design of Robust DSC-PLL under Distorted Grid Voltage Contained Unbalance on Frequency Variation)

  • 이재도;차한주
    • 전기학회논문지
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    • 제67권11호
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    • pp.1447-1454
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    • 2018
  • In this paper, the design of robust DSC-PLL(Delayed Signal Cancellation Phase Locked Loop) is proposed for coping with frequency variation. This method shows significant performance for detection of fundamental positive sequence component voltage when the grid voltage is polluted by grid unbalance and frequency variation. The feedback frequency estimation of DSC-PLL is tracking the drift in the phase by unbalance and frequency variation. The robust DSC PLL is to present the analysis on method and performance under frequency variations. These compensation algorithms can correct for discrepancies of changing the frequency within maximum 193[ms] and improve traditional DSC-PLL. Linear interpolation method is adopted to reduce the discretized errors in the digital implementation of the PLL. For verification of robust characteristic, PLL methods are implemented on FPGA with a discrete fixed point based. The proposed method is validated by both Matlab/Simulink and experimental results based on FPGA(XC7Z030).

교통환경 정온화를 위한 도로 소음의 측정 및 ANC시스템에의 적용 특성 고찰 (A Study on the Characteristics of Applicability in the Active Noise Cancellation System and Measurement of the Road Noise for Traffic Calming)

  • 문학룡;손진근
    • 전기학회논문지P
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    • 제62권3호
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    • pp.111-116
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    • 2013
  • Noise problem that occurs on the road is raising a lot of problems in the economic, social and environmental aspects. The objective of this paper is to propose ANC(active noise cancellation)-based road traffic noise reduction algorithm-model which can reduce noise by generating frequency opposed to noise sources to improve and complement the problem that existing physical form of a noise barrier. In this paper, we measured the noise characteristic from collection of two difference car noise also ANC simulation has been performed by using road traffic noises input. In order to compare the control performance, we performed noise reduction simulation of ANC by filtered-X LMS algorithm and delayed control signal injection. As a result of this simulation, we confirmed that convergence performance and noise decrease effect to the filtered-X LMS algorithm by inputting the road traffic noise.

FPGA를 이용한 DSC-PLL 설계 및 실험 (DSC-PLL Design and Experiments Using a FPGA)

  • 조종민;서재학;차한주
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2014년도 전력전자학술대회 논문집
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    • pp.281-282
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    • 2014
  • 본 논문은 FPGA 기반의 DSC-PLL(Delayed Signal Cancellation - Phase Locked Loop)을 설계하고, 왜곡된 3상전압 조건에서 위상추종결과를 비교실험 하였다. FPGA 구현 알고리즘은 Matlab/Simulink와 연동된 System Generator를 이용하여 DSC-PLL 모델을 설계하고, Verilog HDL 코드로 변환 하였다. 불평형 및 고조파를 포함한 왜곡된 3상 전압 조건에서 FPGA에 구현된 DSC-PLL과 SRF-PLL (Synchronous Reference Frame - Phase Locked Loop)의 d-q축 고조파 감쇠특성 및 위상추종능력을 실험을 통해 비교하였다. DSC-PLL은 약 5.44ms 이내에 d-q축 고조파 성분을 제거함으로써 정상분 기본파 전압의 위상을 빠르게 추종하는 것을 검증하였다.

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Design and Implementation of True Random Noise Radar System

  • Min, Woo-Ki;Kim, Cheol-Hoo;Lukin, Constantin A.;Kim, Jeong-Phill
    • Journal of electromagnetic engineering and science
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    • 제9권3호
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    • pp.130-140
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    • 2009
  • The design theory and experimental results of a true random noise radar system are presented in this paper. Target range information can be extracted precisely by correlation processing between the delayed reference and the signal received from a target, and the velocity information by the Doppler processing with successive correlation data. A K-band noise radar system was designed using random FM noise signal, and the characteristics of the fabricated system were examined with laboratory and outdoor experiments. A C-band random FM noise signal was generated by applying a low-frequency white Gaussian noise source to VCO(Voltage Controlled Oscillator), and a K-band Tx noise signal with 100 MHz bandwidth was obtained by using a following frequency multiplier. Two modified wave-guide horn arrays were designed and fabricated, and used for the Tx and Rx antennas. The required amount of Tx/Rx isolation was attained by using a coupling cancellation circuit as well as keeping them apart with predetermined spacing. A double down-conversion scheme was used in the Rx and reference channels, respectively, for easy post processing such as correlation and Doppler processing. The implemented noise radar performance was examined with a moving bicycle and a very high-speed target with a velocity of 150 m/s. The results extracted by the Matlab simulation using the logging data were found to be in a reasonable agreement with the expected results.

동일 군속도 지연 상쇄기를 이용한 이중 대역 Feedforward 선형 전력 증폭기 (Dual-Band Feedforward Linear Power Amplifier Using Equal Group Delay Signal Canceller)

  • 최흥재;정용채;김홍기;김철동
    • 한국전자파학회논문지
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    • 제18권7호
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    • pp.839-846
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    • 2007
  • 본 논문에서는 새로운 구조의 이중 대역 feedforward 선형 전력 증폭기(FFW LPA)의 설계 방법을 제안하였다. 현재까지 이중 대역 FFW LPA 설계의 기술적인 어려움은 단일 대역 FFW LPA에서 사용되는 신호 상쇄기를 이중 대역 동작으로 확장시키기가 쉽지 않았다는 점이다. 따라서 본 논문에서는 이중 대역 동일 군속도 지연 주 신호 상쇄기와 혼변조 왜곡 신호(Intermodulation Distortion: IMD) 상쇄기의 설계 방법, 그리고 이를 이용하여 단일 대역 FFW 기법을 확장한 이중 대역 FFW LPA의 설계 방법을 제안하였다. 제안하는 설계 방식의 효용성을 검증하기 위하여, 동작 대역의 중심 주파수를 기준으로 1.26 GHz 이격된 디지털 셀룰러 대역($f_0=880$ MHz)과 IMT-2000($f_0=2.14$ GHz) 대역 기지국용 이중 대역 feedforward 선형화 시스템을 구현하였다. 각 대역별로 CDMA IS-95A 4FA 신호와 WCDMA 4FA 신호를 인가하여 인접 채널 누설비(Adjacent Channel Leakage Ratio: ACLR)의 개선 정도를 측정한 결과, 디지털 셀룰러 대역에서 평균 출력 전력 41.5 dBm일 때 16.52 dB, IMT-2000 대역에서 평균 출력 전력 40 dBm일 때 18.59 dB의 개선 효과를 동시에 얻을 수 있었다.