• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.7
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• pp.1-9
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• 1999

This paper presents an analytic 3rd order calculation methods, without simulations, for delay time of RC-class circuits which are conveniently used to on-chip interconnects. While the proposed method requires comparable evaluation time than the previous 2nd order calculation method, it ensures more accurate results than those of 2nd order method. The proposed analytic delay calculation method guarantees allowable error tolerances when compared to the results obtained from the AWE (Asymptotic Waveform Evaluation) technique and has better performance in evaluation time as well as numerical stability. The first algorithm of the proposed method requires 8 moments for the 3rd order approximation and yields more accurate delay time approximation. The second algorithm requires 6 moments for the 3rd order approximation and results in shorter evaluation time, the accuracy of which may be less than the first algorithm.

• Proceedings of the KIPE Conference
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• 2011.07a
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• pp.68-69
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• 2011

Realistic amounts of time delay are found to have significant effects on the average output LED current and on the critical inductor value at the boundary between the two conduction modes. Especially, the time delay can provide an accurate LED current for the peak current controlled (PCC) buck converter with a wide input voltage. Experimental results are presented for the PCC buck LED driver with constant-frequency controller.

• 제어로봇시스템학회:학술대회논문집
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• 1991.10b
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• pp.1888-1893
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• 1991

Systematic design of a controller for a water temperature system was considered, with the intention of devising an accurate control experiment. The results of an experiment using a water temperature system based on the pole placement regulator showed water temperature oscillation and steady state error. This paper proposed a. method for eliminating both the oscillation and the steady state error. The oscillation was eliminated by a drive delay compensation technique, in which a future state value of the system was predicted through a real time computer simulation. The steady state error was eliminated by an steady state error correction technique, in which an actual steady state heatrate in the system model was replaced by an imaginary heatrate. By combining these two techniques, we obtained an experimental result for water temperature control of 0.01 (.deg. C) accuracy. Furthermore, the proposed method was evaluated relatively by comparing the experimental results using several other methods and proved to be the most accurate and convenient control method for the delay system.

• Structural Engineering and Mechanics
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• v.83 no.1
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• pp.93-108
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• 2022

Real-time hybrid simulation (RTHS) was applied to investigate the train-bridge interaction of a high-speed railway system, where the railway bridge was selected as the numerical substructure, and the train was physically tested. The interaction between the two substructures was reproduced by a servo-hydraulic shaking table. To accurately reproduce the high-frequency interaction responses ranging from 10-25Hz using the hydraulic shaking table with an inherent delay of 6-50ms, an adaptive time series (ATS) compensation algorithm combined with the linear quadratic Gaussian (LQG) was proposed and implemented in the RTHS. Testing cases considering different train speeds, track irregularities, bridge girder cross-sections, and track settlements featuring a wide range of frequency contents were conducted. The performance of the proposed ATS+LQG delay compensation method was compared to the ATS method and RTHS without any compensation in terms of residual time delays and root mean square errors between commands and responses. The effectiveness of the ATS+LQG method to compensate time delay in RTHS with high-frequency responses was demonstrated and the proposed ATS+LQG method outperformed the ATS method in yielding more accurate responses with less residual time delays.

• Journal of the Korean Society of Safety
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• v.21 no.4 s.76
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• pp.66-72
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• 2006

An accurate knowledge of the AITs(autoignition temperatures) is important in developing appropriate prevention and control measures in industrial fire protection. The measurement of AITs are dependent upon many factors, namely initial temperature, pressure, vessel size, fuel/air stoichiometry, catalyst, concentration of vapor, ignition delay time. The values of the AITs used process safety are normally the lowest reported, to provide the greatest margin of sefety. This study measured the AITs of o-xylene+n-pentanol system from ignition delay time by using ASTM E659-78 apparatus. The experimental AITs of o-xylene and n-pentanol were $480^{\circ}C\;and\;285^{\circ}C$, respectively. The experiment AITs of o-xylene+n-pentanol system were a good agreement with the calculated AITs by the proposed equations with a few A.A.D.(average absolute deviation).

• 제어로봇시스템학회:학술대회논문집
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• 2002.10a
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• pp.33.1-33
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• 2002

The INS provides high rate position, velocity and attitude data with good short-term stability while the GPS provides position and velocity data with long-term stability. By integrating the INS with GPS, a navigation system can be achieved to provide highly accurate navigation performance. For the best performance, time synchronization of GPS and INS data is very important in GPS/INS integrated system. But, it is impossible to synchronize them exactly due to the communication and computation time-delay. In this paper, to reduce the error caused by the measurement time-delay in GPS/INS integrated systems, error compensation methods using separate bias Kalman filter are suggested for both the...

• Journal of the Korean Institute of Telematics and Electronics A
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• v.28A no.1
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• pp.52-59
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• 1991

An effective and accurate delay time model is the key problem in the simulation and timing verification of CMOS logic circuits. We propose a semi-analytic CMOW delay time model taking into account the configuration ratio, the input waveform slope and the load capacitance. This model is based on the Schichman Hodges's DC equations and derived on the optimally weighted switching peak current. The parameters necessary for the model calculation are automatically determined from the program. The proposed model is computationally effective and the error is typically within 10% of the SPICEA results. Compared to the table RC model, the accuracy is inproved over two times in average.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2003.10a
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• pp.542-547
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• 2003

A network based intrusion detection system(N-IDS), can detect intruders coming in through packets in real time environment. The ability of capture of packet is the most important factor when we evaluate the performance of the system. The time delay between the time handling one packet capture and next one is variant become of packet handling mechanism. So for N-IDS can not settle this problem because most systems use a single processor. In this thesis, we solve the problem of irregular tine delay with a file socket and multi-thread processing. We designed and implement, the Crasto system. By an accurate observation, the performance testing shows that the Crasto reduces the capture delay time to 1/5 comparing to the existing single process N-IDS, and maintain delay time regularly.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.38 no.5
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• pp.323-328
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• 2001

A new time-to-digital converter is proposed which is based on a capacitor and a counter. The conventional time-to-digital converter requires rather longer processing time than the input time interval to obtain an accurate digital output. The resolution of the converted digital output is constant independent on the input time interval. However this study proposes the circuit in which the converted digital output can be obtained without delay time, and both the input time interval and the resolution can be easily improved through controlling passive device parameters.

• Proceedings of the KIEE Conference
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• 1995.07b
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• pp.922-924
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• 1995

The modeling of accurate timing in storage elements of ASIC cell library was studied. The propagation delay time of clock signal affects the critical time and this can cause malfunction in the chip designed in synchronous. In this paper, an analysis on the effect of input slope of clock signal in timing modeling were carried out. For the first time, in ASIC design, the design guides that can be used in both $0.6{\mu}M$ and $0.8{\mu}m$ design rule were offered, reducing the run time of SPICE and the time of cell library development.