• Proceedings of the KIEE Conference
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• 1999.07d
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• pp.1809-1811
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• 1999

In recent years, attempts have been made to greatly improve the display quality of active-matrix liquid crystal display devices, and many techniques have been proposed to solve such problems as gate delay, feed-through voltage and image sticking. Gate delay is one of the biggest limiting factors for large-screen-size, high-resolution thin-film transistor liquid crystal display (TFT/LCD) design. Many driving method proposed for TFT/LCD progress. Thus we developed gate driving signal generator. Since Pixel-Design Array Simulation Tool (PDAST) can simulate the gate, data and pixel voltages of a certain pixel on TFT array at any time and at any location on an array, the effect of the driving signals of gate lines on the pixel operations can be effectively analyzed.

• 전기의세계
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• v.28 no.5
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• pp.44-48
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• 1979

For ordinary systems the receding horizon method has beer proved by the author as a very useful and easy tool to find stable feedback controls. In this paper an open-loop optimal control which minimizes the control energy with a suitable upper limit and terminal control and state constraints is derived and then transformed to the closed-loop control. The stable feedback control law is obtained from the closed-loop control. The stable feedback control law is obtained from the closed-loop control by the receding horizon concept. It is shown by the Lyapunov method that the control law derived from the receding, horizon concept is asymtotically stable under the complete controllability condition. The stable feedback control which is similar to but more general than the receding horizon control is presented in this paper To the author's knowledge the control laws in this paper are easiest to stabilize systems with delay in control.

• Proceedings of the Korea Society for Simulation Conference
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• 2001.10a
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• pp.459-463
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• 2001

We model and simulate master-driven TDD wireless communication systems, e.g., Bluetooth systems. We model the Bluetooth system and use the BONeS simulation tool to conduct event-drivers simulations. In order to support more than seven slave devices in a piconet, a park mode is considered and modeled. We evaluate the performance, i.e., throughput and delay, using simulations when multi-connections (bath ACL and SCO connections) are present in a piconet. We show that the data rate of ACL connections may be less than 20 kbps when SCO connection(s) and more than six ACL connections are jointly supported in a piconet. In addition, if up to five ACL connections are supported, the average delay is shown to be maintained less than 20 msec. Our results can serve as a guideline to the design of master-driven TDD wireless communication systems with performance requirements.

• Journal of the Korea Society for Simulation
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• v.4 no.1
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• pp.1-11
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• 1995

The model of a FMS (Flexible Manufacturing System) admits to a natural hierarchical decomposition of highly decoupled units with similar structure and control. The FMS fractal architecture model represents a hierarchical structure built from elements of a single basic design. A SES (System Entity Structure) is a structural knowledge representation scheme that contains knowledge of decomposition, taxonomy, and coupling relationships of a system necessary to direct model synthesis. A substructure of a SES is extracted for use as the skeleton for a model. This substructure is called pruned SES and the extraction operation of a pruned SES from a SES is called pruning (or pruning operation). This paper presents a pruning operation called recursive pruning. It is applied to SES for generating a model structure whose sub-structure contains copies if itself as in FMS fractal architecture. Another pruning operation called delay pruning is also presented. Combined with recursive pruning the delay pruningis a useful tool for representing and constructing complex systems.

• Journal of the Korean Institute of Telematics and Electronics
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• v.27 no.6
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• pp.963-971
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• 1990

This paper proposes a memory intensive VLSI architecture for the realization of real-time 3x3 neighborhood processor based on the distributed arithmetic. The proposed architecture is characterized by a bit serial and multi-kernel parallel processing which exploits the pixel kernel parallelism and concurrency. The chip implements 8 neighborhood processing elements in parallel with efficirnt input and output modules which operate concurrently. Besides the a4chitectural design of a neighborhood processor, the design methodology using module generator concept has been considered and MOGOT(MOdule Generator Oriented VLSI design Tool) has been constructed based on the workstation. Based on these design environments MOGOT, it has been shown that the main part of the suggested architecture can be designed efficiently using 2\ulcorner double metal CMOS technology. It includes design of input delay and data conversion module, look-up table for inner product operation, carry save accumulator, output data converter and delay module, and control module.

• Journal of information and communication convergence engineering
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• v.7 no.3
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• pp.309-313
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• 2009

In this paper, end-to-end VoIP(Voice over Internet Protocol) performance is evaluated by simulation with NS-2 simulation tool. There are many results studied and published for VoIP performance over TCP/IP networks. But, almost all of them were focused on wired or wireless Internet environments. About MANET (Mobile Ad Hoc Network), VoIP is currently studying several points of research. In this paper, analysis of VoIP performance is done with focusing on the mobility of MANETs. MOS(Mean Opinion Score), network delay, packet loss rates are considered as end-to-end QoS performance parameters.

• Journal of KSNVE
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• v.10 no.6
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• pp.949-954
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• 2000

Applicability of the vibration signal phase for predicting the modal damping properties of structures is investigated. For uniform plates with different internal damping levels, the phase delay as a function of the frequency span as well as a function of the distance between the excitation and response measurement points are experimentally obtained. Dependence of the phase characteristics on the amount of structural damping is elucidated -more heavily damped plate shows notably reduced phase delay at intermediate distances. The experimental results compare favorably with analytical predictions, and show much promise for further refinement as a tool for estimating structural properties.

• Proceedings of the Optical Society of Korea Conference
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• 2001.02a
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• pp.78-79
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• 2001

노광 후 지연(Post Exposure Delay： PED) 효과는 그림 1과 같이 노광 후 지연 시간에 따른 감광제의 Profile에 thinning, T-top, foot, undercut 를 보여주는 현상으로 화학 증폭형 감광제(Chemically Amplified Resist, CAR) 개발에 있어 PED의 안정성은 중요한 요소이다(1). 따라서 노광후 지연 효과에 대한 모델링은 연구와 개발을 위한 시뮬레이션 tool에 있어 매우 의미 있는 일이다. T-top 이나 undercut 를 형성하는 Surface inhibition layer(SIL) 은 노광 후 지연시 발생되는 environmental base contamination, acid evaporation 이 주요 원인이며 다른 원인으로는 감광제 속에서 acid migration, spin coating 동안에 photoacid generator (PAG)의 고갈, internal basic impurities 이며 그 외에 nonbsic atmospheric contamination, high power laser source의 영향 등이 있다. (중략)

• Proceedings of the KIEE Conference
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• 2006.10a
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• pp.158-159
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• 2006

The resistance-capacitance (RC) delay of signals through interconnection materials becomes a big hurdle for high speed operation of semiconductors which contain multilayer interconnection layers. In order to reduce the RC delay, low-k materials will be used for inter-metal dielectric (IMD) materials. We have developed self-consistent simulation tool that includes neutral-species transport model, based on the relaxation continuum (RCT) model. We present the parametric study of the modeling results of a two-frequency capacitively coupled plasma (2f-CCP) with $N_2/H_2$ gas mixture that is known as promising one for organic low-k materials etching. We include the neutral transport model as well as plasma one in the calculation. The plasma and neutrals are calculated self-consistently by iterating the simulation of both species till a spatiotemporal steady state profile could be obtained.

• Proceedings of the Korea Information Processing Society Conference
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• 2009.11a
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• pp.189-190
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• 2009

For applications involving the monitoring of large areas, dense sensor networks are not practical. For such applications, delay tolerant networks which consist of disconnected clusters of sensors that are visited periodically by a mobile robot are implemented. Because clock synchronization is critical to any data collection endeavor, and because the structure of DTNs is unique, this paper examines various clock synchronization algorithms as they apply to DTNs. A simulation tool was developed to examine and evaluate the RBS clock synchronization algorithm for DTNs.