• 제목/요약/키워드: Deep-level transient spectroscopy

검색결과 44건 처리시간 0.06초

PICTS방법에 의한 Boron이온을 주입시킨 반절연성 GaAs의 깊은준위에 관한 연구 (A study on the deep levels in boron ion implanted semi-insulating GaAs by PICTS)

  • 최현태;김인수;이철욱;손정식;김영일;배인호
    • E2M - 전기 전자와 첨단 소재
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    • 제8권4호
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    • pp.426-433
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    • 1995
  • Effect of boron in GaAs have been investigated by photo induced current transient spectroscopy(PICTS). The starting material was undoped liquid encapsulated Czochralski(LEC) semi insulating GaAs and boron ion implantation at 150keV energy was conducted with dose of 10$\^$12/ and 10$\^$13/ions/cm$\^$2/. In ion implanted samples, the peaks related arsenic vacancy(V$\_$As/) were decreased but complex lattice defect was increased with annealing temperature. U band was observed at ion implanted(10$\^$13/ ions/cm$\^$2/) and thermally treated(550.deg. C) sample. More negative peak was detected after annealing at temperature between 600 and 700.deg. C. The measurement of dark current showed that the formation of B$\_$GA/-V$\_$As/, complex defect and complex lattice defect by ion implantation were a reasonable explanation for the decrease in dark current.

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GaAs 기판 위에 EDMIn과 TBP로부터 성장되고 양극산화 처리된 InP Schottky Diode (Anodically Oxidized InP Schottky Diodes Grown From EDMIn and TBP on GaAs Substrates)

  • 유충현
    • 한국전기전자재료학회논문지
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    • 제16권6호
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    • pp.471-476
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    • 2003
  • Au/oxide/n-InP Schottky diodes were fabricated from heteroepitaxial InP layers grown on GaAs substrates by the metalorganic vapor phase epitaxy (MOVPE) method from a new combination of source materials: ethyldimethylindium (EDMIn) and tertiarybutylphosphine (TBP). Anodic oxidation technique by using a solution of 10 g of ammonium pentaborate in 100 cc of ethylene glycole as the electrolyte was used to deposit a thin oxide layer. The barrier heights determined from three different techniques, current-voltage (I-V) measurements at room temperature and in the temperature range of 273 K - 373 K, and room temperature capacitance-voltage (C-V) measurements are in good agreement, 0.7 - 0.9 eV which is considerably high as compared to the 0.45 - 0.55 eV in Au/n-InP Schottky diode without a Passivation layer. The ideality factors of 1.1 - 1.3 of the Schottky diodes were also determined from the I-Y characteristics. Deep level transient spectroscopy (DLTS) studies revealed only one shallow electron state at 92.6 meV below the bottom of the conduction band and no deep state in the heteroepitaxial InP layers grown from EDMIn and TBP.

Oxygen Plasma Effect on AlGaN/GaN HEMTs Structure Grown on Si Substrate

  • Seo, Dong Hyeok;Kang, Sung Min;Lee, Dong Wha;Ahn, Du Jin;Park, Hee Bin;Ahn, Youn Jun;Kim, Min Soo;Kim, Yu Kyeong;Lee, Ho Jae;Song, Dong Hun;Kim, Jae Hee;Bae, Jin Su;Cho, Hoon Young
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2013년도 제44회 동계 정기학술대회 초록집
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    • pp.420-420
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    • 2013
  • We investigated oxygen plasma effect on defect states near the interface of AlGaN/GaN High Electron Mobility Transistor (HEMT) structure grown on a silicon substrate. After the plasma treatment, electrical properties were evaluated using a frequency dependant Capacitance-Voltage (C-V) and a temperature dependant C-V measurements, and a deep level transient spectroscopy (DLTS) method to study the change of defect densities. In the depth profile resulted from the temperature dependant C-V, a sudden decrease in the carrier concentration for two-dimensional electron gas (2DEG) nearby 250 K was observed. In C-V measurement, the interface states were improved in case of the oxygen-plasma treated samples, whereas the interface was degraded in case of the nitrogen-plasma treated sample. In the DLTS measurement, it was observed the two kinds of defects well known in AlGaN/GaN structure grown on sapphire substrate, which have the activation energies of 0.15 eV, 0.25 eV below the conduction band. We speculate that this defect state in AlGaN/GaN on the silicon substrate is caused from the decrease in 2DEG's carrier concentrations. We compared the various DLTS signals with filling pulse times to identify the characteristics of the newly found defect. In the filling pulse time range under the 80 us, the activation energies changed as the potential barrier model. On the other hand, in the filling pulse time range above the 80 us, the activation energies changed as the extended potential model. Therefore, we suggest that the found defect in the AlGaN/GaN/Si structure could be the extended defect related with AlGa/N/GaN interface states.

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GaAs Metal-Semiconductor Field-Effect Transistor에서 표면 결함이 소자의 전달컨덕턴스 분산 및 게이트 표면 누설 전류에 미치는 영향 (Effects of Surface States on the Transconductance Dispersion and Gate Leakage Current in GaAs Metal - Semiconductor Field-Effect Transistor)

  • 최경진;이종람
    • 대한전자공학회논문지SD
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    • 제38권10호
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    • pp.678-686
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    • 2001
  • CaAs metal semiconductor field effect transistor (MESFET) 소자의 전달컨덕턴스 분산 (transconductance dispersion) 현상과 게이트 누설 전류의 원인을 capacitance deep level transient spectroscopy (DLTS) 측정을 이용하여 해석하였다. DLTS 스펙트럼에서는 활성화 에너지가 각각 0.65×0.07 eV와 0.88 × 0.04 eV인 두개의 표면 결함과 0.84 × 0.01 eV의 활성화 에너지를 갖는 EL2를 관찰하였다. 전달컨덕턴스 분산 측정 결과, 전달컨덕턴스는 5.5 Hz ∼ 300 Hz의 주파수 영역에서 감소하였다. 전달컨덕턴스 분산을 온도의 함수로 측정한 결과, 온도가 증가할수록 전이 주파수는 증가하였고 전이 주파수의 온도 의존성으로부터 0.66 ∼ 0.02 eV의 활성화 에너지를 구할 수 있었다. 게이트 누설 전류 측정에서는 0.15 V 이하의 게이트 전압에서 순 방향과 역 방향 게이트 전압이 일치하는 오믹 전류-전압 특성을 나타내었고 게이트 누설 전류의 온도 의존성으로부터 구한 활성화 에너지는 0.63 ∼ 0.01 eV로 계산되었다. 서로 다른 방법으로 구한 활성화 에너지의 비교로부터 표면 결함 H1이 주파수에 따라서 감소하는 전달컨덕턴스 분산 및 게이트 누설 전류의 원인임을 알 수 있었다.

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Modulation of Defect States in Co- and Fe-implanted Silicon by Rapid Thermal Annealing

  • Lee, Dong-Uk;Lee, Kyoung-Su;Pak, Sang-Woo;Suh, Joo-Young;Kim, Eun-Kyu;Lee, Jae-Sang
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2012년도 제42회 동계 정기 학술대회 초록집
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    • pp.314-314
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    • 2012
  • The dilute magnetic semiconductors (DMS) have been developed to multi-functional electro-magnetic devices. Specially, the Si based DMS formed by ion implantation have strong advantages to improve magnetic properties because of the controllable effects of carrier concentration on ferromagnetism. In this study, we investigated the deep level states of Fe- and Co-ions implanted Si wafer during rapid thermal annealing (RTA) process. The p-type Si (100) wafers with hole concentration of $1{\times}10^{16}cm^{-3}$ were uniformly implanted by Fe and Co ions at a dose of $1{\times}10^{16}cm^{-2}$ with an energy of 60 keV. After RTA process at temperature ranges of $500{\sim}900^{\circ}C$ for 5 min in nitrogen ambient, the Au electrodes with thickness of 100 nm were deposited to fabricate a Schottky contact by thermal evaporator. The surface morphology, the crystal structure, and the defect state for Fe- and Co- ion implanted p-type Si wafers were investigated by an atomic force microscopy, a x-ray diffraction, and a deep level transient spectroscopy, respectively. Finally, we will discuss the physical relationship between the electrical properties and the variation of defect states for Fe- and Co-ions implanted Si wafer after RTA.

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DLTS 법(法)에 의한 Laser CVD SiON 막(膜)-Si 계(系)의 계면(界面) 특성(特性) (Laser CVD SiON-Si interface investigation by DLTS)

  • 천영일;김상욱;이승환;박지순;박근영;성영권
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1991년도 추계학술대회 논문집 학회본부
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    • pp.237-240
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    • 1991
  • In this paper, silicon oxynitride(SiON) films were chemically deposited by 193 nm Excimer laser irradiated parallel to the substrate. the laser pulse energy was 80 mJ, repetetion rate was 80 Hz and the laser average power was 6.4 watt, the gas ratio of $N_2O/NH_3$ was 0.75, the substrate temperature was $300^{\circ}C$, and the chamber pressure was 2 torr. And then, the interface state density($N_{ss}$) was characterized by DLTS(Deep Level Transient Spectroscopy). In addition, the capture cross section($\sigma$) and activation energy(${\Delta}E$) was also obtained. The resulting Nss values were $5.5{\times}10^{10}-3.2{\times}10^{11}(eV^{-1}cm^{-2})$, $\sigma$ was $6.64{\times}10^{-20}-2.114{\times}10^{-17}(cm^2)$, the ${\Delta}E$ of two peaks were $8.93{\times}10^{-2}$(eV), 0.375(eV).

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광전류를 이용한 n-ZnO/p-Si과 n-ZnO/p-GaN p-n 접합 다이오드의 결함 분석

  • 조성국;남창우;김은규
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2013년도 제44회 동계 정기학술대회 초록집
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    • pp.178-178
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    • 2013
  • 고체내의 결함을 분석하기 위한 장비로는 대표적으로 DLTS (deep level transient spectroscopy)를 이용하여 깊은 준위 결함의 활성화에너지를 구하는 분석법, 투과전자현미경을 이용한 박막의 결정살창 분석법, photoluminescence나 electroluminescence를 이용하여 광학적인 방법으로 결함을 분석하는 방법, 마지막으로 광전류 측정을 통하여 결함을 분석하는 방법 등이 있다. 이 중에서도 빛에 의해서 증가되는 광전류를 이용한 결함 분석 방법은 과거에는 종종 시행되어 왔으나 최근에는 거의 연구되어지고 있지 않고 있다. 고체 내의 많은 결함들이 빛에만 반응하는 결함도 있으며 전기적인 측정을 통해서만 발견되는 결함이 존재하기 때문에 모든 부분을 다 만족시키는 방법은 찾기가 힘들다고 알려져 있다. 한편, ZnO는 octahedral 구조로 공간이 비어있기 때문에 여러 가지 결함이 존재하는데, 그 중에서 valence band 바로 위 0.3~0.5 eV에 존재하는 결함 준위는 Zn 빈자리에 의한 결함으로 이론적으로만 밝혀졌을 뿐 실험적으로는 현재까지 발견되어지고 있지 않다. 본 연구에서는 광전류를 이용하여 n-ZnO/p-Si과 n-ZnO/p-GaN p-n 접합 다이오드 내의 결함에 대한 연구를 진행하였다. ZnO를 UHV 스퍼터링 방법으로 성장하였으며 ZnO의 결함의 양을 조절하기 위해 박막의 두께와 증착할 때의 기판 속도 등을 조절하였다. 이렇게 성장된 ZnO 기반의 다이오드를 광전류 측정을 이용하여 결함을 분석하였다. 실험결과 420 nm 파장의 빛을 다이오드에 주사하였을 때 광전류가 크게 증가하는 것을 확인하였으며 이것은 이론적으로만 주장되어져 왔던 Zn 빈자리 결함에 의한 것으로 판단되었다.

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The Passivation of GaAs Surface by Laser CVD

  • Sung, Yung-Kwon;Song, Jeong-Myeon;Moon, Byung-Moo;Rhie, Dong-Hee
    • 한국전기전자재료학회논문지
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    • 제16권12S호
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    • pp.1242-1247
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    • 2003
  • In order to passivate the GaAs surface, silicon-nitride films were fabricated by using laser CVD method. SiH$_4$ and NH$_3$ were used to obtain SiN films in the range of 100∼300$^{\circ}C$ on p-type (100) GaAs substrate. To determine interface characteristics of the metal-insulator-GaAs structure, electrical measurements were performed such as C-V curves and deep level transient spectroscopy (DLTS). The results show that the hysteresis was reduced and interface trap density was lowered to 1,012 ∼ 1,013 at 100 ∼ 200$^{\circ}C$. According to the study of surface leakage current, the passivated CaAs has less leakage current compared to non-passivated substrate.

Laser CVD법에 의한 III-V화합물 반도체 표면의 불활성화 (The passivation of III-V compound semiconductor surface by laser CVD)

  • 이한신;이계신;조태훈;허윤종;김성진;성영권
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1993년도 하계학술대회 논문집 B
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    • pp.1274-1276
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    • 1993
  • The silicon-nitride films formed by laser CVD method are used for passivating GaAs surfaces. The electrical Properties of metal-insulator-GaAs structure are studied to determined the interfacial characteristics by C-V curves and deep level transient spectroscopy(DLTS). The SiN films are photolysisly deposited from $SiH_4\;and\;NH_3$ in the range of $100^{\circ}C-300^{\circ}C$ on P type, (100) GaAs. The hysteresis is reduced and interface trap density is lowered to $10^{12}-10^{13}$ at $100^{\circ}C-200^{\circ}C$. The surface leakage current is studied too. The passivated GaAs have a little leakage current compared to non passivated GaAs.

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PECVD방법으로 형성한 $W_{67}N_{33}$/GaAs구조의 열적 특성 (Thermal characteristics of $W_{67}N_{33}$/GaAs structure)

  • 이세정;홍종성;이창우;이종무;김용태;민석기
    • 한국재료학회지
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    • 제3권5호
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    • pp.443-450
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    • 1993
  • 실리콘이 주입된 CaAs 기판위에 플라즈마 화학 증착법으로 자기정렬 gate구조의 Schottky contact을 형성하였다. 갈륨비소 소자 제조를 위하여 두께 1600$\AA$의 턴스텐질화막을 $350^{\circ}C$에서 증착하여 $750^{\circ}C$에서 $900^{\circ}C$까지 급속 열처리 하였다. 텅스텐 질화막과 GaAs계면의 열적 안정성을 XRD(X-ray diffraction), PL(photoluminescence),ODLTS(optical deep livel transient spectroscopy)측정으로 조사하였으며, W보다 $W_{67}N_{33}$ gate를 형성시킬 경우에 GaAs에 미치는 열적손상이 적음을 알 수 있으며 이온 주입한 Si이온이 활성화 되는 것으로 생각된다. $W_{67}N_{33}$ GaAs 다이오드가 약 800-$900^{\circ}C$의 고온열처리 온도에서 W/GaAs 다이오드의 경우보다 열적 안정성이 우수하였다.

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