• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.12 s.354
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• pp.23-32
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• 2006

Fast and accurate power bus design (FAPUD) method for multi-layers high-speed digital boards is devised for the power supply network design tool for accurate and precise high speed board. FAPUD is constructed, based on two main algorithms of the PBEC (Path Based Equivalent Circuit) model and the network synthesis method. The PBEC model exploits simple arithmetic expressions of the lumped 1-D circuit model from the electrical parameters of a 2-D power distribution network. The circuit level design based on PBEC is carried with the proposed regional approach. The circuit level design directly calculates and determines the size of on-chip decoupling capacitors, the size and the location of off-chip decoupling capacitors, and the effective inductances of the package power bus. As a design output, a lumped circuit model and a pre-layout of the power bus including a whole decoupling capacitors are obtained after processing FAPUD. In the tuning procedure, the board re-optimization considering simultaneous switching noise (SSN) added by I/O switching can be carried out because the I/O switching effect on a power supply noise can be estimated over the operation frequency range with the lumped circuit model. Furthermore, if a design changes or needs to be tuned, FAPUD can modify design by replacing decoupling capacitors without consuming other design resources. Finally, FAPUD is accurate compared with conventional PEEC-based design tools, and its design time is 10 times faster than that of conventional PEEC-based design tools.

• Journal of the Speleological Society of Korea
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• no.80
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• pp.21-24
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• 2007

The need for high-frequency decoupling capacitors to supply the transient current requirements to high-speed devices is ubiquitous in current microelectronics applications. Even though materials and their processes have already been developed in terms of their performances, low manufacturing cost cannot be overemphasized in current microelectronics industry. For this reason, we revisited low cost ceramic filled polymer integrated capacitor. Experiments were performed according to the design of experiment (DOE). The best recipe that has the optimized ratio of material composite was obtained using by response optimizer in Minitab. And also, high-frequency measurements were performed to get frequency dependent data using network analyzer.

• Proceedings of the Korea Electromagnetic Engineering Society Conference
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• 2002.11a
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• pp.340-343
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• 2002

Electromagnetic(EM) radiation problems and their possible solutions are addressed in this paper for the split power plane of high-speed digital systems. Stitching and decoupling capacitors are proved to be very effective fur reducing signal noise, ground bounce as well as electromagnetic radiation from the split power plane. Simulations based on 3D-Finite Difference Time Domain (FDTD) method are utilized for the analysis of practical high frequency multi-layered PC main board

• Journal of electromagnetic engineering and science
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• v.2 no.2
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• pp.75-80
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• 2002

Signal integrity problems and their possible solutions are addressed in this paper for split power plane of high-speed digital systems. Stitching and decoupling capacitors are proved to be very effective for reducing signal noise, ground bounce as well as electromagnetic radiation from the split power plane. Simulations based on 3D-Finite Difference Time Domain (FDTD) method are utilized for the analysis of practical high frequency multi-layered PC main board.

• Journal of the Korean Institute of Intelligent Systems
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• v.10 no.3
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• pp.211-217
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• 2000

A main contribution of this paper is the development of a Hopfield network-based algorithm for the fault diagnosis of the actuators in linear system with uncertainties. An unknown input decoupling approach is introduced to the design of an adaptive observer so that the observer is insensitive to uncertainties. As a result, the output observation error equation does not depend on the effect of uncertainties. Simultaneous energy minimization by the Hopfield network is used to minimize the least mean square of errors of errors of estimates of output variables. The Hopfield network provides an estimate of the gains of the actuators. When the system dynamics changes, identified gains go through a transient period and this period is used to detect faults. The proposed scheme is demonstrated through its application to a simulated second-order system.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.4
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• pp.15-22
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• 2004

This paper presents the channel analysis considering power distribution network(PDN) system of PCB. For achieve the target PDN system we proposed the useful design approach for acquiring the characteristic target of power distribution network in overall frequency ranges. The proposed method is based on the hierarchical approach related to frequency ranges and the path-based equivalent circuit model to consider the interference of the current paths between the decoupling capacitors and the board through it is a lumped model for fast and easy calculation, experimental results show that the proposed model is almost as precise as the numerical analysis. The analysis of PDN system shows that although the effective inductance of package dominatly affects the power noise and the signal transfer through data channel, the board PDNs also can not be neglected for achieving the accurate channel signaling. Therefore, we must design concurrently the chip, package, and board from the initial spec design of high speed digital system.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2000.10a
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• pp.190-195
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• 2000

This paper presents the fabrication of the LNA which is operating at 2.13∼2.16 GHz for IMT-2000 lot-end receiver using series feedback and resistive decoupling circuit. Series feedback added to the source lead of a transistor keep the low noise characteristics and drop the input reflection coefficient of amplifier simultaneously. Also, it increases the stability of the LNA. Resistive decoupling circuit is suitable for input stage matching because a signal at low frequency is dissipated by a resistor in the matching network The amplifier consist of GaAs FET ATF-10136 for low noise stage and VNA-25 which is internally matched MMIC for high gain stage. The amplifier is fabricated with both the RF circuits and self bias circuit on the Teflon substrate with 3.5 permittivity. The measured results of the LNA which is fabricated using above design technique are presented more than 30 dB in gain P$\_$ldB/ 17 dB and less than 0.7 dB in noise figure, 1.5 in input$.$output SWR(Standing Wave Ratio).

• Journal of the Microelectronics and Packaging Society
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• v.20 no.4
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• pp.41-45
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• 2013

Modern electronic devices such as tablets and smartphones are getting more powerful and efficient. The demand in feature sets, functionality and usability increase exponentially and this has posed a great challenge to the design of a power distribution network (PDN). Power rails merging is a popular option used today in a PDN design as numerous power rails are no longer feasible due to form factor limitation and cost constraint. In this paper, the criteria and limitations for power rails merging are discussed. Despite having all the advantages such as pin count reduction, decoupling capacitors sharing, lower impedance and cost saving, power rails merging can however, introduce coupling noise to the system. In view of this, a PDN design with power rails merging that fulfills design recommendations and specifications such as noise target, power well placement, voltage supply values as well as power supply quadrant assignment is extremely important.

• Journal of Power Electronics
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• v.19 no.5
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• pp.1289-1302
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• 2019

In this paper, an optimal allocation method of a hybrid active power filter in an active distribution network is designed based on the differential evolution algorithm to resolve the harmonic generation problem when a distributed generation system is connected to the grid. A distributed generation system model in the calculation of power flow is established. An improved back/forward sweep algorithm and a decoupling algorithm are proposed for fundamental power flow and harmonic power flow. On this basis, a multi-objective optimization allocation model of the location and capacity of a hybrid filter in an active distribution network is built, and an optimal allocation scheme of the hybrid active power filter based on the differential evolution algorithm is proposed. To verify the effect of the harmonic suppression of the designed scheme, simulation analysis in an IEEE-33 nodes model and an experimental analysis on a test platform of a microgrid are adopted.

• 한국신재생에너지학회:학술대회논문집
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• 2006.06a
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• pp.253-256
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• 2006

This paper shows operating characteristics of DFIG(Double Fed Induction Generator) for wind turbine. The back to back PWM voltage-fed inverter connected between the rotor and grid network operated sub and super-synchronous operating mode, and the vector-controlled DFIG enables the decoupling between active and reactive power as well as between torque and power factor. This paper is validated by simulations and experimental results.