• Title/Summary/Keyword: Decoupling Capacitance

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Single Phase Grid Connected Voltage-ed Inverter Utilizing a Power Decoupling Function (전력 디커플링 기능을 가진 단상 계통연계 전압형 인버터)

  • Lee, Sang-Wook;Mun, Sang-Pil;Park, Han-Seok
    • The Transactions of the Korean Institute of Electrical Engineers P
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    • v.66 no.4
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    • pp.236-241
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    • 2017
  • This paper presents a single-phase grid connected voltage-ed inverter with a power decoupling circuit. In the single-phase grid connected voltage-ed inverter, it is well known that a power pulsation with twice the grid frequency is contained in the input power. In a conventional voltage type inverter, electrolytic capacitors with large capacitance have been used in order to smooth the DC voltage. However, lifetime of those capacitors is shortened by the power pulsation with twice grid frequency. The authors have been studied a active power decoupling(APD) method that reduce the pulsating power on the input DC bus line, this enables to transfer the ripple energy appeared on the input DC capacitors into the energy in a small film capacitor on the additional circuit. Hence, extension of the lifetime of the inverter can be expected because the small film capacitor substitutes for the large electrolytic capacitors. Finally, simulation and experimental results are discussed.

Controller Design of Bidirectional Buck-Boost Converter for Power Decoupling of Photovoltaic Micro-Inverter (태양광 마이크로 인버터의 Power Decoupling을 위한 양방향 벅-부스트 컨버터 제어기 설계)

  • Shin, Jong-Hyun;Park, Joung-Hu
    • Proceedings of the KIPE Conference
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    • 2014.11a
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    • pp.13-14
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    • 2014
  • 본 논문에서는 유사 DC-Link 타입의 태양광 마이크로 인버터에서 요구되는 대용량의 전해 커패시터의 단점을 지적하고 이를 제거하기 위해 shunt 방식으로 연결되는 양방향 벅-부스트 컨버터 제어방법을 제안한다. 태양광 마이크로 인버터는 동작 특성상 PV 입력단에 120Hz 리플이 존재하지만 대용량의 전해 커패시터를 적용함으로써 리플을 제거할 수 있다. 하지만 전해 커패시터의 짧은 수명이 전체 시스템의 신뢰성을 저하시키기 때문에 이를 극복하기 위한 부가적인 회로가 필요하다. 본 논문에서는 제안한 1차측의 플라이백 스위치 전류 제어기의 레퍼런스를 공유함으로써 전류 센서수를 감소시키고 PV 입력단 Capacitance를 낮출 수 있는 양방향 벅-부스트 회로의 제어기를 시뮬레이션을 통하여 검증하였다.

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Double Boost Power-Decoupling Topology Suitable for Low-Voltage Photovoltaic Residential Applications Using Sliding-Mode Impedance-Shaping Controller

  • Tawfik, Mohamed Atef;Ahmed, Ashraf;Park, Joung-Hu
    • Journal of Power Electronics
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    • v.19 no.4
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    • pp.881-893
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    • 2019
  • This paper proposes a practical sliding-mode controller design for shaping the impedances of cascaded boost-converter power decoupling circuits for reducing the second order harmonic ripple in photovoltaic (PV) current. The cascaded double-boost converter, when used as power decoupling circuit, has some advantages in terms of a high step-up voltage-ratio, a small number of switches and a better efficiency when compared to conventional topologies. From these features, it can be seen that this topology is suitable for residential (PV) rooftop systems. However, a robust controller design capable of rejecting double frequency inverter ripple from passing to the (PV) source is a challenge. The design constraints are related to the principle of the impedance-shaping technique to maximize the output impedance of the input-side boost converter, to block the double frequency PV current ripple component, and to prevent it from passing to the source without degrading the system dynamic responses. The design has a small recovery time in the presence of transients with a low overshoot or undershoot. Moreover, the proposed controller ensures that the ripple component swings freely within a voltage-gap between the (PV) and the DC-link voltages by the small capacitance of the auxiliary DC-link for electrolytic-capacitor elimination. The second boost controls the main DC-link voltage tightly within a satisfactory ripple range. The inverter controller performs maximum power point tracking (MPPT) for the input voltage source using ripple correlation control (RCC). The robustness of the proposed control was verified by varying system parameters under different load conditions. Finally, the proposed controller was verified by simulation and experimental results.

Reduction of DC-Link Capacitance in Single-Phase Non-Isolated Onboard Battery Chargers

  • Nguyen, Hoang Vu;Lee, Sangmin;Lee, Dong-Choon
    • Journal of Power Electronics
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    • v.19 no.2
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    • pp.394-402
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    • 2019
  • This paper proposes a single-phase non-isolated onboard battery charger (OBC) for electric vehicles (EVs) that only uses small film capacitors at the DC-link of the AC-DC converter. In the proposed charger, an isolated DC-DC converter for low-voltage batteries is used as an active power decoupling (APD) circuit to absorb the ripple power when a high-voltage (HV) battery is charged. As a result, the DC-link capacitance in the AC-DC converter of the HV charging circuit can be significantly reduced without requiring any additional devices. In addition, some of the components of the proposed circuit are shared in common for the different operating modes among the AC-DC converter, LV charging circuit and active power filter. Therefore, the cost and volume of the onboard battery charger can be reduced. The effectiveness of the proposed topology has been verified by the simulation and experimental results.

A Study on the Embedded Capacitor for High Frequency Decoupling (고주파용 디커플링 임베디드 캐패시터에 관한 연구)

  • Hong, Keun-Kee;Hong, Soon-Kwan
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.9 no.4
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    • pp.918-923
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    • 2008
  • We proposed an embedded capacitor with the unique electrode structure, which electrodes are located on the same plane and dielectric gap was formed by electrodes. We named it 'Gap type EC', and it was analyzed by the FEM(Finite element Method) program tool. The resonant frequency of Cap type EC was obtained at more higher frequency region. Also, resonant frequency was changed with the magnitude and thickness of electrodes. The Gap type EC with the dielectric gap of $50{\mu}m$ showed capacitance density of $55pF/cm^2$. This value is the higher than that of conventional EC. So, we concluded that the Gap type EC can be a good candidate for high frequency decoupling.

Electrical Properties of BaTiO3-based 0603/0.1µF/0.3mm Ceramics Decoupling Capacitor for Embedding in the PCB of 10G RF Transceiver Module

  • Park, Hwa-sun;Na, Youngil;Choi, Ho Joon;Suh, Su-jeong;Baek, Dong-Hyun;Yoon, Jung-Rag
    • Journal of Electrical Engineering and Technology
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    • v.13 no.4
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    • pp.1638-1643
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    • 2018
  • Multi-layer ceramic capacitors as decoupling capacitor were fabricated by dielectric composition with a high dielectric constant. The fabricated decoupling capacitors were embedded in the PCB of the 10G RF transceiver module and evaluated for the characteristics of electrical noise by the level of AC input voltage. In order to further improve the electrical properties of the $BaTiO_3$ based composite, glass frit, MgO, $Y_2O_3$, $Mn_3O$, $V_2O_5$, $BaCO_3$, $SiO_2$, and $Al_2O_3$ were used as additives. The electrical properties of the composites were determined by various amounts of additives and optimum sintering temperature. As a result of the optimized composite, it was possible to obtain a density of $5.77g/cm^3$, a dielectric constant of 1994, and an insulation resistance of $2.91{\times}10^{12}{\Omega}$ at an additive content of 5wt% and a sintering temperature of $1250^{\circ}C$. After forming a $2.5{\mu}m$ green sheet using the doctor blade method, a total of 77 layers were laminated and sintered at $1180^{\circ}C$. A decoupling capacitor with a size of $0.6mm(W){\times}0.3mm(L){\times}0.3mm(T)$ (width, length and thickness, respectively) and a capacitance of 100 nF was embedded using a PCB process for the 10G RF Transceiver modules. In the range of AC input voltage 400mmV @ 500kHz to 2200mV @ 900kHz, the embedded 10G RF Transceiver modules evaluated that it has better electrical performance than the non-embedded modules.

Power Integrity and Shielding Effectiveness Modeling of Grid Structured Interconnects on PCBs

  • Kwak, Sang-Keun;Jo, Young-Sic;Jo, Jeong-Min;Kim, So-Young
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.12 no.3
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    • pp.320-330
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    • 2012
  • In this paper, we investigate the power integrity of grid structures for power and ground distribution on printed circuit board (PCB). We propose the 2D transmission line method (TLM)-based model for efficient frequency-dependent impedance characterization and PCB-package-integrated circuit (IC) co-simulation. The model includes an equivalent circuit model of fringing capacitance and probing ports. The accuracy of the proposed grid model is verified with test structure measurements and 3D electromagnetic (EM) simulations. If the grid structures replace the plane structures in PCBs, they should provide effective shielding of the electromagnetic interference in mobile systems. An analytical model to predict the shielding effectiveness (SE) of the grid structures is proposed and verified with EM simulations.

Study on Optimal Design of DC Capacitance for Active Power Decoupling Circuits (능동 전력 디커플링 회로의 커패시턴스 최적 설계에 관한 연구)

  • Baek, Ki-Ho;Park, Sung-Min
    • Proceedings of the KIPE Conference
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    • 2018.07a
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    • pp.326-327
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    • 2018
  • 본 논문에서는 단상전력변환시스템에서 발생하는 고유의 2차 리플 전력 문제를 해결하고 dc 캐패시터의 저감을 위한 능동 전력 디커플링 회로의 설계방법을 제시한다. 일반적인 수동 전력 디커플링 방법, 벅-타입 방법 및 커패시터 분할 타입 방법의 능동 전력 디커플링 회로들에서 필요한 최소의 커패시턴스를 계산하는 방법을 제시하고, 같은 조건에서 리플 전력 디커플링 성능을 분석한다. 도출된 최소한의 커패시턴스를 적용한 디커플링 회로의 성능은 MATLAB 시뮬레이션 결과를 통해 비교 분석하였다.

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A case-study on low Capacitance Lumped Elements Effects on Parallel Plates (저용량형 국부소자가 평행평판에 미치는 영향에 대한 비교연구)

  • Ju, Jeong-Ho;Kahng, Sung-Tek;Kim, Hyeong-Seok
    • Proceedings of the KIEE Conference
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    • 2006.07c
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    • pp.1585-1586
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    • 2006
  • This paper conducts a study on the way the PCB's parallel plates' performances are affected by the loading of low cap. elements such as low cap-decoupling capacitors in conjunction with other lumped element. The fields and impedance profiles are rigorously evaluated and analyzed on various cases loaded with the above components and their effects will be given to bring better PCB EMC schemes.

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Capacitance Design Method of Active Power Decoupling Circuit Considering DC-link Voltage Ripple of On-board Charger (전기자동차용 탑재형 충전기의 DC-link 전압 리플을 고려한 능동 전력 디커플링 회로의 커패시턴스 저감 기법)

  • Noh, Tae-Won;Koo, Geun Wan;Lee, Byoung Kuk
    • Proceedings of the KIPE Conference
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    • 2020.08a
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    • pp.34-36
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    • 2020
  • 본 논문은 전기자동차용 탑재형 충전기에 사용되는 능동 전력 디커플링 회로의 커패시턴스 저감 기법을 제안한다. 탑재형 충전기의 허용 DC-link 전압 리플과 커패시턴스 사이의 관계를 분석하고, 허용 리플 크기에 따른 최적 커패시턴스의 크기를 도출한다. 제안하는 설계 기법은 시뮬레이션 및 실험 결과를 기반으로 검증한다.

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