• The Journal of the Korea institute of electronic communication sciences
• /
• v.5 no.1
• /
• pp.23-30
• /
• 2010

The H.264/AVC is increasingly used in broadcast video applications such as Internet Protocol television (IPTV), digital multimedia broadcasting (DMB) because of high compression performance. But the H.264/AVC coded video can be delivered to the widespread end-user equipment for MPEG-2 after transcoding between this video standards. This paper suggests a new transcoding algorithm for H.264/AVC to MPEG-2 transcoder that uses motion vector clustering in order to reduce the complexity without loss of video quality. The proposed method is exploiting the motion information gathered during h.264 decoding stage. To reduce the search space for the MPEG-2 motion estimation, the predictive motion vector is selected with a least distortion of the candidated motion vectors. These candidate motion vectors are considering the correlation of direction and distance of motion vectors of variable blocks in H.264/AVC. And then the best predictive motion vector is refined with full-search in ${\pm}2$ pixel search area. Compared with a cascaded decoder-encoder, the proposed transcoder achieves computational complexity savings up to 64% with a similar PSNR at the constant bitrate(CBR).

• Journal of Broadcast Engineering
• /
• v.25 no.3
• /
• pp.338-345
• /
• 2020

Versatile Video Coding (VVC), which has been developing as a next generation video coding standard, has adopted various techniques to achieve more than twice the compression performance of HEVC (High Efficiency Video Coding). The recently released VVC Test Model (VTM) shows 38% Bjontegaard Delta bitrate (BD-rate) improvement and 9x/1.6x encoding/decoding complexity over HEVC. In order to reduce such increased complexity, various fast algorithms have been proposed. In this paper, gradient-based methods of fast intra mode decision and block splitting are presented. Experimental results show that, compared to VTM6.0, the proposed method gives up to 65% encoding time reduction with 3.54% BD-rate loss in All-Intra (AI) configuration.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.39 no.4
• /
• pp.104-111
• /
• 2002

In this paper, we proposed the architecture of the decoder which implements the multi-view images decoding algorithm. The study of the hardware structure of the multi-view image processing has not been accomplished. The proposed multi-view images decoder operates in a three stage pipelined manner and extracts the depth of the pixels of the decoded image every clock. The multi-view images decoder consists of three modules, Node selector which transfers the value of the nodes repeatedly and Depth Extractor which extracts the depth of each pixel from the four values of the nodes and Affine transformer which generates the projecting position on the image plane from the values of the pixels and the specified viewpoint. The proposed architecture is designed and simulated by the Max+plus II design tool and the operating frequency is 30MHz. The image can be constructed in a real time by the decoder with the proposed architecture.

• Journal of the Institute of Electronics Engineers of Korea SP
• /
• v.48 no.2
• /
• pp.41-52
• /
• 2011

It is important to reduce computational complexity of de-blocking filter for real-time implementation, because it accounts for a great part of total computational complexity of the decoder. Because there are a lot of conditional branches and memory accesses in a decoding loop, it is not easy to speed up the de-blocking filter. Therefore, this paper presents a new algorithm of de-blocking filter minimizing conditional branches and memory accesses. The proposed structure of de-blocking filter enables filter operation to parallelize by software pipelining. The proposed optimization method was implemented on a TMS320DM6467 EVM board and we achieved approximately 46% cycle reduction, compared with that of FFmpeg.

• Journal of Internet Computing and Services
• /
• v.11 no.2
• /
• pp.143-153
• /
• 2010

When providing high quality panoramic video across the Internet, mobile communications, and broadcasting areas, it requires a suitable video codec that satisfies both high-compression efficiency and random access functionality. The users must have high-compression efficiency in order to enable video streaming of high-volume panoramic data. Random access allows the user to move the viewpoint and direction freely. In this paper, we propose the parallel processing scheme under cell units in order to improve the performance of streaming service for large screen panoramic video in 10Mbps bandwidths based on H.264/AVC with high compression rate. This improved algorithm divides a screen composed of cells less than $256{\times}256$ in size, encodes it, and decodes it with the cells in the present view. At this point, encoding/decoding is parallel processed by the present cell units. Also, since the cells only included in the present view are packed and transmitted, the possible processing of not extricating blocks is proven by experiment.

• The Journal of the Acoustical Society of Korea
• /
• v.13 no.1E
• /
• pp.11-19
• /
• 1994

Hidden Markov Models (HMM's) with explicit state duration density (HMM/SD) can represent the time-varying characteristics of speech signals more accurately. However, such an advantage is reduced in relatively smooth state duration densities or ling bounded duration. To solve this problem, we propose HMM's with global path constraint (HMM/GPC) where the transition between states occur only within prescribed time slots. HMM/GPC explicitly limits state durations and accurately describes the temproal structure of speech simply and efficiently. HMM's formed by combining HMM/GPC with HMM/SD are also presented (HMM/SD+GPC) and performances are compared. HMM/GPC can be implemented with slight modifications to the conventional Viterbi algorithm. HMM/GPC and HMM/SD_GPC not only show superior performance than the conventional HMM and HMM/SD but also require much less computation. In the speaket independent isolated word recognition experiments, the minimum recognition eror rate of HMM/GPC(1.6%) is 1.1% lower than the conventional HMM's and the required computation decreased about 57%.

• Journal of Korea Multimedia Society
• /
• v.15 no.8
• /
• pp.1017-1030
• /
• 2012

Most watermarking schemes for video contents protection have been studied to increase watermark's robustness and invisibility against such compressions and many kinds of signal processing after embedding copyright information to the original contents. This paper proposes an active watermarking that infect watermark to contents in the video decoding process using embedded infectious watermark and control signals from a video encoder side. To achieve this algorithm, we design a kernel based watermarking in video encoder side that is possible to recover the original contents and watermark in watermark detection procedure perfectly. And then, by reversible de-watermarking in video decoder side, we design the active watermark infection method using detected watermark and control signal. This means that our system can provide secure re-distributions of video contents without any quality degration and watermark bit error against transcoding or re-encoding processing. By experimental results, we confirmed that the embedded watermark was infected by video contents and codec perfectly without any declines of compression ratio and video quality.

• Journal of the Korea Academia-Industrial cooperation Society
• /
• v.11 no.1
• /
• pp.141-150
• /
• 2010

In this paper, performance of a turbo-coded OFDM system is analyzed and simulated in a power line communication channel. Since the power line communication system typically operates in a hostile environment, turbo code has been employed to enhance reliability of transmitted data. The performance is evaluated in terms of bit error probability. As turbo decoding algorithms, MAP (maximum a posteriori), Max-Log-MAP, and SOVA (soft decision viterbi output) algorithms are chosen and their performances are compared. From simulation results, it is demonstrated that Max-Log-MAP algorithm is promising in terms of performance and complexity. It is shown that performance is improved 3dB by increasing the number of iterations, 2 to 8, and interleaver length of a turbo encoder, 100 to 5000. The results in this paper can be applied to OFDM-based high-speed power line communication systems.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.41 no.12
• /
• pp.1834-1843
• /
• 2016

DVRs are the most common recording and displaying devices used for surveillance. Video compression plays a key role in DVRs for saving storage; the video compression standard, H.264/AVC, has recently become the dominant choice for DVRs. DVRs require various display modes, such as fast-forward, backward play, and pause; these are called trick modes. The implementation of precise trick mode play requires a very high decoding capability or a very intelligent scheme in order to handle the high computation complexity. The complexity is increased in many surveillance applications where more than one camera is used to monitor multiple spots or to monitor the same area using various angles. An implementation of a trick mode play and a frame buffer management scheme for the hardware-based H.264/AVC codec for multi-channel is presented in this paper. The experimental results show that exact trick mode play is possible using a standard H.264/AVC video codec with keyframe encoding feature at the expense of bitstream size increase.

• Journal of the Institute of Convergence Signal Processing
• /
• v.7 no.1
• /
• pp.17-23
• /
• 2006

In recent years, RFID has received much attention because of spread usage in industrial applications including factory, material flow, logistics and defense areas. However, there is only CRC-16 for error detection in ISO/IEC 18000-6 Protocols prepared for 860-960 MHz RFID, high error rates are expected in cases of high level of security and noisy envirionment. In this paper, we propose a usage of convolution code as a method for satisfying the high level of security requirement and system error performance.'1'he signal control function is implemented in a microprocessor with RF modulation and the convolutional encoding and Viterbi decoding are implemented in an FPGA chip.'The frame error rates are measured with and without convolution coding under the channel conditions of line-of- sight and non line-of-sight, respectively.