• Title/Summary/Keyword: Data Parallel

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A Disk Allocation Scheme for High-Performance Parallel File System (고성능 병렬화일 시스템을 위한 디스크 할당 방법)

  • Park, Kee-Hyun
    • The Transactions of the Korea Information Processing Society
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    • v.7 no.9
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    • pp.2827-2835
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    • 2000
  • In recent years, much attention has been focused on improving I/O devices' processing speed which is essential in such large data processing areas as multimedia data processing. And studies on high-performance parallel file systems are considered to be one of such efforts. In this paper, an efficient disk allocation scheme is proposed for high-performance parallel file systems. In other words, the concept of a parallel disk file's parallelism is defined using data declustering characteristic of a given parallel file. With the concept, an efficient disk allocation scheme is proposed which calculates the appropriate degree of data declustering on disks for each parallel file in order to obtain the maximum throughput when more than one parallel file is used at the same time. Since, calculation for obtaining the maximum throughput is too complex as the number of parallel files increases, an approximate disk allocation algorithm is also proposed in this paper. The approximate algorithm is very simple and especially provides very good results when I/O workload is high. In addition, it has shown that the approximate algorithm provides the optimal disk allocation for the maximum throughput when the arrival rate of I/O requests is infinite.

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Fuzzy Inference of Large Volumes in Parallel Computing Environment (병렬컴퓨팅 환경에서의 대용량 퍼지 추론)

  • 김진일;박찬량;이동철;이상구
    • Proceedings of the Korean Institute of Intelligent Systems Conference
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    • 2000.05a
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    • pp.13-16
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    • 2000
  • In fuzzy expert systems or database systems that have huge volumes of fuzzy data or large fuzzy rules, the inference time is much increased. Therefore, a high performance parallel fuzzy computing environment is needed. In this paper, we propose a parallel fuzzy inference mechanism in parallel computing environment. In this, fuzzy rules are distributed and executed simultaneously. The ONE_TO_ALL algorithm is used to broadcast the fuzzy input vector to the all nodes. The results of the MIN/MAX operations are transferred to the output processor by the ALL_TO_ONE algorithm. By parallel processing of fuzzy rules or data, the parallel fuzzy inference algorithm extracts effective parallel ism and achieves a good speed factor.

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Rsearch in Server Striping policy for Parallel Video Server System (Parallel Video Server system을 위한 Server Striping 정책에 관한 연구)

  • 구태연;김길용
    • Proceedings of the Korean Information Science Society Conference
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    • 2000.10c
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    • pp.576-578
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    • 2000
  • 현재의 대부분의 VOD System에서는 Single Server System의 제약인 확장성과 안정적 서비스를 제공하기 위해 Multi-Server System을 사용하고 있다. Multiple Server에 Video Data를 Striping한 구조를 Parallel Video Server Architecture라 한다. 본 연구에서는 Parallel Video Server System 상에서 Data의 Striping Policy에 대해 고찰해보고 이때 발생하는 load balancing과 redundancy 문제의 해결책을 제시하였다. 또한 이를 실제 local Network 시스템에 적용하여 구현하였다.

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Performance Evaluation and Verification of MMX-type Instructions on an Embedded Parallel Processor (임베디드 병렬 프로세서 상에서 MMX타입 명령어의 성능평가 및 검증)

  • Jung, Yong-Bum;Kim, Yong-Min;Kim, Cheol-Hong;Kim, Jong-Myon
    • Journal of the Korea Society of Computer and Information
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    • v.16 no.10
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    • pp.11-21
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    • 2011
  • This paper introduces an SIMD(Single Instruction Multiple Data) based parallel processor that efficiently processes massive data inherent in multimedia. In addition, this paper implements MMX(MultiMedia eXtension)-type instructions on the data parallel processor and evaluates and analyzes the performance of the MMX-type instructions. The reference data parallel processor consists of 16 processors each of which has a 32-bit datapath. Experimental results for a JPEG compression application with a 1280x1024 pixel image indicate that MMX-type instructions achieves a 50% performance improvement over the baseline instructions on the same data parallel architecture. In addition, MMX-type instructions achieves 100% and 51% improvements over the baseline instructions in energy efficiency and area efficiency, respectively. These results demonstrate that multimedia specific instructions including MMX-type have potentials for widely used many-core GPU(Graphics Processing Unit) and any types of parallel processors.

Optimal Economic Load Dispatch using Parallel Genetic Algorithms in Large Scale Power Systems (병렬유전알고리즘을 응용한 대규모 전력계통의 최적 부하배분)

  • Kim, Tae-Kyun;Kim, Kyu-Ho;Yu, Seok-Ku
    • The Transactions of the Korean Institute of Electrical Engineers A
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    • v.48 no.4
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    • pp.388-394
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    • 1999
  • This paper is concerned with an application of Parallel Genetic Algorithms(PGA) to optimal econmic load dispatch(ELD) in power systems. The ELD problem is to minimize the total generation fuel cost of power outputs for all generating units while satisfying load balancing constraints. Genetic Algorithms(GA) is a good candidate for effective parallelization because of their inherent principle of evolving in parallel a population of individuals. Each individual of a population evaluates the fitness function without data exchanges between individuals. In application of the parallel processing to GA, it is possible to use Single Instruction stream, Multiple Data stream(SIMD), a kind of parallel system. The architecture of SIMD system need not data communications between processors assigned. The proposed ELD problem with C code is implemented by SIMSCRIPT language for parallel processing which is a powerfrul, free-from and versatile computer simulation programming language. The proposed algorithms has been tested for 38 units system and has been compared with Sequential Quadratic programming(SQP).

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Reliability for Series and Parallel Systems in Bivariate Pareto Model : Random Censorship Case

  • Cho, Jang-Sik;Cho, Kil-Ho;Lee, Woo-Dong
    • Journal of the Korean Data and Information Science Society
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    • v.14 no.3
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    • pp.461-469
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    • 2003
  • In this paper, we consider the series and parallel system which include two components. We assume that the lifetimes of two components follow the bivariate Pareto model with random censored data. We obtain the estimators and approximated confidence intervals of the reliabilities for series and parallel systems based on maximum likelihood estimator and the relative frequency, respectively. Also we present a numerical example by giving a data set which is generated by computer.

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Development of Realtime Parallel Data Communication Interface for Remote Control of 6-DOF Industrial Robot (산업용 6관절 로봇의 원격제어를 위한 실시간 병렬데이터통신 인터페이스)

  • Choi, Myoung-Hwan;Lee, Woo-Won
    • Journal of Industrial Technology
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    • v.21 no.A
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    • pp.97-103
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    • 2001
  • This paper presents the development of the I/O Interface for the real time parallel data communication between controller of a six-axis industrial robot(CRS-A460) and an external computer. The proposed I/O Interface consists of the hardware I/O interface and the software that is downloaded to the robot controller and executed by the controller operating system. The constitution of the digital I/O Port for CRS-A460 robot controller and the digital I/O board for IBM-PC are presented as well as the Process Control Program of the robot controller. The developed protocol for the parallel data communication is described. The data communication is tested, and the performance is analysed. In particular, it is shown that the real-time constraint of the robot controller process is satisfied.

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A Study on Improvement of Low-power Memory Architecture in IoT/edge Computing (IoT/에지 컴퓨팅에서 저전력 메모리 아키텍처의 개선 연구)

  • Cho, Doosan
    • Journal of the Korean Society of Industry Convergence
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    • v.24 no.1
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    • pp.69-77
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    • 2021
  • The widely used low-cost design methodology for IoT devices is very popular. In such a networked device, memory is composed of flash memory, SRAM, DRAM, etc., and because it processes a large amount of data, memory design is an important factor for system performance. Therefore, each device selects optimized design factors such as function, performance and cost according to market demand. The design of a memory architecture available for low-cost IoT devices is very limited with the configuration of SRAM, flash memory, and DRAM. In order to process as much data as possible in the same space, an architecture that supports parallel processing units is usually provided. Such parallel architecture is a design method that provides high performance at low cost. However, it needs precise software techniques for instruction and data mapping on the parallel architecture. This paper proposes an instruction/data mapping method to support optimized parallel processing performance. The proposed method optimizes system performance by actively using hardware and software parallelism.

Modeling and Verification of Workflows with Various Parallel Dependencies (다양한 병행 종속성을 포함한 워크플로우 모델링 및 검증)

  • 정희택;이도헌
    • The Journal of Information Technology and Database
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    • v.6 no.1
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    • pp.59-72
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    • 1999
  • A study on workflow system as an automated business processing system is done recently. However, it did not consider various dependencies between parallel tasks. Therefore, this paper proposes modeling and verification of workflows with various parallel dependencies. For this, firstly, we propose four dependencies to specify various parallel dependencies between tasks. They contain sequential starts, parallel starts, sequential commits, and parallel commits. Secondly, we suggest a method to specify various parallel dependencies on workflow graph. Thirdly, we propose a verification method to detect contradictions on workflow specifications.

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Calibration of 6-DOF Parallel Mechanism Through the Measurement of Volumetric Error (공간오차 측정을 통한 6자유도 병렬기구의 보정)

  • Oh, Yong-Taek;Saragih, Agung S.;Kim, Jeong-Hyun;Ko, Tae-Jo
    • Journal of the Korean Society of Manufacturing Process Engineers
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    • v.11 no.3
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    • pp.48-54
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    • 2012
  • This paper introduces the kinematic calibration method to improve the positioning accuracy of a parallel mechanism. Since all the actuators in the parallel mechanism are controlled simultaneously toward the target position, the volumetric errors originated from each motion element are too complicated. Therefore, the exact evaluation of the error sources of each motion element and its calibration is very important in terms of volumetric errors. In the calibration processes, the measurement of the errors between commands and trajectories is necessary in advance. To do this, a digitizer was used for the data acquisition in 3 dimensional space rather than arbitrary planar error data. After that, the optimization process that was used for reducing the motion errors were followed. Consequently, Levenberg-Marquart algorithm as well as the error data acquisition method turned out effective for the purpose of the calibration of the parallel mechanism.