• Title/Summary/Keyword: Data Architectures

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The Development of an Integration Tool for the Data Sharing Among the Enterprise information Systems (기업 정보 시스템간 효율적인 데이터 공유를 위한 통합 도구 개발)

  • 한관희;박찬우;최운집;이상한
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 2004.10a
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    • pp.782-787
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    • 2004
  • Recently, many enterprises are introducing EAI(Enterprise Application Integration) technologies for integrating heterogeneous enterprise information systems. Among EAI levels, data-level integration is relatively straightforward and most popular. However, current commercial solutions have complex functionalities and are expensive for implementing the data integration tasks. Also, they have their own proprietary architectures and have a restricted interoperability. Proposed in this paper is the development of data integration middleware for facilitating data exchanges between the heterogeneous information systems. The main feature of this middleware is a explicit mapping of meta data about the relationships between source and target data. Based on this mapping, users who do not have expertise in information technology at the small & medium enterprise can easily handle data exchange tasks between information systems.

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The Development of a Data Integration Middleware for Enterprise Information Systems (기업 정보 시스템 간 데이터 통합을 위한 미들웨어 개발)

  • Han, K.H.;Park, C.W.;Bae, S.M.
    • IE interfaces
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    • v.17 no.4
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    • pp.407-413
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    • 2004
  • Recently, many enterprises are adopting EAI (Enterprise Application Integration) technologies for integrating heterogeneous enterprise information systems. Among EAI levels, data-level integration is relatively straightforward and most popular. However, most commercial solutions provide complex functionalities and are expensive for implementing the data integration tasks at the small & medium enterprises. Also, they have their own proprietary architectures and have a restricted interoperability. Proposed in this paper is the development of a data integration middleware for facilitating data exchanges between the heterogeneous information systems. The main feature of this middleware is a explicit mapping of meta data about the relationships between source and target data. Based on this explicit mapping, users who do not have expertise in information technology at the small & medium enterprises can easily execute data exchange tasks among various information systems.

Evaluating and Mitigating Malicious Data Aggregates in Named Data Networking

  • Wang, Kai;Bao, Wei;Wang, Yingjie;Tong, Xiangrong
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.11 no.9
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    • pp.4641-4657
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    • 2017
  • Named Data Networking (NDN) has emerged and become one of the most promising architectures for future Internet. However, like traditional IP-based networking paradigm, NDN may not evade some typical network threats such as malicious data aggregates (MDA), which may lead to bandwidth exhaustion, traffic congestion and router overload. This paper firstly analyzes the damage effect of MDA using realistic simulations in large-scale network topology, showing that it is not just theoretical, and then designs a fine-grained MDA mitigation mechanism (MDAM) based on the cooperation between routers via alert messages. Simulations results show that MDAM can significantly reduce the Pending Interest Table overload in involved routers, and bring in normal data-returning rate and data-retrieval delay.

Design of a Node Label Data Flow Machine based on Self-timed (Self-timed 기반의 Node Label Data Flow Machine 설계)

  • Kim, Hee-Sook;Jung, Sung-Tae;Park, Hee-Soon
    • Proceedings of the KIEE Conference
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    • 1998.11b
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    • pp.666-668
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    • 1998
  • In this paper we illustrate the design of a node label data flow machine based on self-timed paradigm. Data flow machines differ from most other parallel architectures, they are based on the concept of the data-driven computation model instead of the program store computation model. Since the data-driven computation model provides the excution of instructions asynchronously, it is natural to implement a data flow machine using self timed circuits.

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Evaluating Chest Abnormalities Detection: YOLOv7 and Detection Transformer with CycleGAN Data Augmentation

  • Yoshua Kaleb Purwanto;Suk-Ho Lee;Dae-Ki Kang
    • International journal of advanced smart convergence
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    • v.13 no.2
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    • pp.195-204
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    • 2024
  • In this paper, we investigate the comparative performance of two leading object detection architectures, YOLOv7 and Detection Transformer (DETR), across varying levels of data augmentation using CycleGAN. Our experiments focus on chest scan images within the context of biomedical informatics, specifically targeting the detection of abnormalities. The study reveals that YOLOv7 consistently outperforms DETR across all levels of augmented data, maintaining better performance even with 75% augmented data. Additionally, YOLOv7 demonstrates significantly faster convergence, requiring approximately 30 epochs compared to DETR's 300 epochs. These findings underscore the superiority of YOLOv7 for object detection tasks, especially in scenarios with limited data and when rapid convergence is essential. Our results provide valuable insights for researchers and practitioners in the field of computer vision, highlighting the effectiveness of YOLOv7 and the importance of data augmentation in improving model performance and efficiency.

Handoff Delay Analysis of IP Mobility Management Schemes Using SIP and MIP (SIP와 MIP를 사용한 IP 이동성 관리 방법들에 대한 핸드오프 지연시간 분석)

  • 김창호;노병희;유승화
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.29 no.8A
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    • pp.909-917
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    • 2004
  • Mobility support is one of the most important functions to provide seamless data transfer for real-time multimedia services in wireless networks. In this paper, we analyze and compare the handoff delay performances for several architectures such as MIP-RO, SIP, MIP-RO/CIP and SIP/CIP, which are expected to be a promising solution to support IP mobility management. For the analysis, we make the detailed message flows of those architectures in handoffs, and then make an analytical model to compute the handoff delay for each scheme. Numerical results showed that the SIP/CIP approach outperformed other schemes in the viewpoints of the handoff delay.

Understanding recurrent neural network for texts using English-Korean corpora

  • Lee, Hagyeong;Song, Jongwoo
    • Communications for Statistical Applications and Methods
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    • v.27 no.3
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    • pp.313-326
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    • 2020
  • Deep Learning is the most important key to the development of Artificial Intelligence (AI). There are several distinguishable architectures of neural networks such as MLP, CNN, and RNN. Among them, we try to understand one of the main architectures called Recurrent Neural Network (RNN) that differs from other networks in handling sequential data, including time series and texts. As one of the main tasks recently in Natural Language Processing (NLP), we consider Neural Machine Translation (NMT) using RNNs. We also summarize fundamental structures of the recurrent networks, and some topics of representing natural words to reasonable numeric vectors. We organize topics to understand estimation procedures from representing input source sequences to predict target translated sequences. In addition, we apply multiple translation models with Gated Recurrent Unites (GRUs) in Keras on English-Korean sentences that contain about 26,000 pairwise sequences in total from two different corpora, colloquialism and news. We verified some crucial factors that influence the quality of training. We found that loss decreases with more recurrent dimensions and using bidirectional RNN in the encoder when dealing with short sequences. We also computed BLEU scores which are the main measures of the translation performance, and compared them with the score from Google Translate using the same test sentences. We sum up some difficulties when training a proper translation model as well as dealing with Korean language. The use of Keras in Python for overall tasks from processing raw texts to evaluating the translation model also allows us to include some useful functions and vocabulary libraries as well.

New execution model for CAPE using multiple threads on multicore clusters

  • Do, Xuan Huyen;Ha, Viet Hai;Tran, Van Long;Renault, Eric
    • ETRI Journal
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    • v.43 no.5
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    • pp.825-834
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    • 2021
  • Based on its simplicity and user-friendly characteristics, OpenMP has become the standard model for programming on shared-memory architectures. Checkpointing-aided parallel execution (CAPE) is an approach that utilizes the discontinuous incremental checkpointing technique (DICKPT) to translate and execute OpenMP programs on distributed-memory architectures automatically. Currently, CAPE implements the OpenMP execution model by utilizing the DICKPT to distribute parallel jobs and their data to slave machines, and then collects the results after executing these distributed jobs. Although this model has been proven to be effective in terms of performance and compatibility with OpenMP on distributed-memory systems, it cannot fully exploit the capabilities of multicore processors. This paper presents a novel execution model for CAPE that utilizes two levels of parallelism. In the proposed model, we add another level of parallelism in the form of multithreaded processes on slave machines with the goal of better exploiting their multicore CPUs. Initial experimental results presented near the end of this paper demonstrate that this model provides significantly enhanced CAPE performance.

Distributed control system architecture for deep submergence rescue vehicles

  • Sun, Yushan;Ran, Xiangrui;Zhang, Guocheng;Wu, Fanyu;Du, Chengrong
    • International Journal of Naval Architecture and Ocean Engineering
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    • v.11 no.1
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    • pp.274-284
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    • 2019
  • The control architectures of Chuan Suo (CS) deep submergence rescue vehicle are introduced. The hardware and software architectures are also discussed. The hardware part adopts a distributed control system composed of surface and underwater nodes. A computer is used as a surface control machine. Underwater equipment is based on a multi-board-embedded industrial computer with PC104 BUS, which contains IO, A/D, D/A, eight-channel serial, and power boards. The hardware and software parts complete data transmission through optical fibers. The software part involves an IPC of embedded Vxworks real-time operating system, upon which the operation of I/O, A/D, and D/A boards and serial ports is based on; this setup improves the real-time manipulation. The information flow is controlled by the software part, and the thrust distribution is introduced. A submergence vehicle heeling control method based on ballast water tank regulation is introduced to meet the special heeling requirements of the submergence rescue vehicle during docking. Finally, the feasibility and reliability of the entire system are verified by a pool test.

Design and Performance Analysis of Multi-Swap Architectures for Mobile Devices (모바일 기기를 위한 다중 스왑 아키텍처의 설계 및 성능 분석)

  • Hyokyung Bahn;Jisun Kim
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.23 no.4
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    • pp.53-58
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    • 2023
  • As smartphones increasingly support the execution of various applications, the function of virtual memory swapping is becoming important. However, unlike traditional computer systems, mobile platforms do not basically support swapping. This is because swapping results in frequent writes to flash memory, which may degrade the performance of smartphone's storage significantly. To cope with this situation, this paper suggests two multi-swap architectures, hierarchical swapping and hybrid swapping, and compares their performance quantitatively. Specifically, this paper shows that hybrid swapping with the consideration of single-access data can reduce swapping traffic to flash memory, and improve the performance compared to traditional swapping.