• Journal of Communications and Networks
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• v.17 no.3
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• pp.286-295
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• 2015

Avionic databuses fulfill a critical function in the connection and communication of aircraft components and functions such as flight-control, navigation, and monitoring. Ethernet-based avionic databuses have become the mainstream for large aircraft owning to their advantages of full-duplex communication with high bandwidth, low latency, low packet-loss, and low cost. As a new generation aviation network communication standard, avionics full-duplex switched ethernet (AFDX) adopted concepts from the telecom standard, asynchronous transfer mode (ATM). In this technology, the switches are the key devices influencing the overall performance. This paper reviews the avionic databus with emphasis on the switch architecture classifications. Based on a comparison, analysis, and discussion of the different switch architectures, we propose a new avionic switch design based on a time-division switch fabric for high flexibility and scalability. This also merges the design concept of space-partition switch fabric to achieve reliability and predictability. The new switch architecture, called space partitioned shared memory switch (SPSMS), isolates the memory space for each output port. This can reduce the competition for resources and avoid conflicts, decrease the packet forwarding latency through the switch, and reduce the packet loss rate. A simulation of the architecture with optimized network engineering tools (OPNET) confirms the efficiency and significant performance improvement over a classic shared memory switch, in terms of overall packet latency, queuing delay, and queue size.

• Computers and Concrete
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• v.15 no.2
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• pp.167-181
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• 2015

"Mortar or concrete pneumatically projected at high velocity onto a surface" is called Shotcrete. Models that predict shotcrete design parameters (e.g. compressive strength, slump etc) from any mixing proportions of admixtures could save considerable experimentation time consumed during trial and error based procedures. Artificial Neural Network (ANN) has been widely used for similar purposes; however, such models have been rarely applied on shotcrete design. In this study 19 samples of shotcrete test panels with varying quantities of water, steel fibers and silica fume were used to determine their slump, cost and compressive strength at different ages. A number of 3-layer Back propagation Neural Network (BPNN) models of different network architectures were used to train the network using 15 samples, while 4 samples were randomly chosen to validate the model. The predicted compressive strength from linear regression lacked accuracy with $R^2$ value of 0.36. Whereas, outputs from 3-5-3 ANN architecture gave higher correlations of $R^2$ = 0.99, 0.95 and 0.98 for compressive strength, cost and slump parameters of the training data and corresponding $R^2$ values of 0.99, 0.99 and 0.90 for the validation dataset. Sensitivity analysis of output variables using ANN can unfold the nonlinear cause and effect relationship for otherwise obscure ANN model.

• ETRI Journal
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• v.32 no.1
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• pp.73-83
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• 2010

Combinatorial testing has been an active research area in recent years. One challenge in this area is dealing with the combinatorial explosion problem, which typically requires a very expensive computational process to find a good test set that covers all the combinations for a given interaction strength (t). Parallelization can be an effective approach to manage this computational cost, that is, by taking advantage of the recent advancement of multicore architectures. In line with such alluring prospects, this paper presents a new deterministic strategy, called multicore modified input parameter order (MC-MIPOG) based on an earlier strategy, input parameter order generalized (IPOG). Unlike its predecessor strategy, MC-MIPOG adopts a novel approach by removing control and data dependency to permit the harnessing of multicore systems. Experiments are undertaken to demonstrate speedup gain and to compare the proposed strategy with other strategies, including IPOG. The overall results demonstrate that MC-MIPOG outperforms most existing strategies (IPOG, IPOF, IPOF2, IPOG-D, ITCH, TConfig, Jenny, and TVG) in terms of test size within acceptable execution time. Unlike most strategies, MC-MIPOG is also capable of supporting high interaction strengths of t > 6.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.10
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• pp.23-29
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• 2004

In this paper, the asynchronous quasi dual-port SRAM employing a single port structure in SRAM embedded SOC (System On Chip) is proposed. External host can access the internal SRAM freely and the data on internal SRAM can be transferred to an another external circuitry without a synchronous signal of an external host, which operates as an asynchronous dual-port SRRAH The performances of the proposed circuits and control structure are verified through the simulation and we fabricated it using a 0.35um CMOS technology. As the results, the chip shows reduced area about 20% and saved power also 20% than conventional architectures.

• ETRI Journal
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• v.36 no.6
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• pp.905-912
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• 2014

In this paper, a new architecture is proposed to achieve complexity efficiency in implementing variable pulse position modulation (VPPM). VPPM, specified in IEEE 802.15.7, can support wireless communication and dimming control simultaneously using visible light. The proposed architecture is based on the VPPM signal property in which the transition point of the modulated output is obtained by counting the sample index and comparing it to both the assigned dimming factor and the transmitting data. Therefore, the proposed architecture can be composed of simple logics, including a counter, a comparator, and an inverter, all of which are insensitive to the dimming resolution in contrast to a conventional codeword-table method. This paper describes the verification of the proposed algorithm through a register-transfer level implementation of the codeword and proposed architectures. In comparison with the codeword-table method, the proposed method gains a nine-fold complexity reduction at a 1% dimming-step resolution.

• KIPS Transactions on Software and Data Engineering
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• v.4 no.11
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• pp.487-498
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• 2015

Traceability enables software developers to trace up the changes occurring in software artifacts. In software product line, traceability is more complex than traceability in a single product as commonality and variability should be considered. Modeling traceability between features and requirements has been proposed in the past. However, traceability between requirements and architecture has more factors to consider, including many-to-many mappings and hierarchical structure of architectures. This paper proposes a method of systematically constructing platform traceability between platform requirements and platform architecture. This paper also shows the efficacy of the proposed mechanism through case studies.

• The Transactions of the Korea Information Processing Society
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• v.6 no.9
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• pp.2512-2523
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• 1999

In this paper, we present the design and implementation results of RTP(Real-time Transport Protocol) which is introduced to provide end-to-end delivery service for multimedia data with real-time characteristics and to provide QoS(quality of service) monitoring services. Conventional RTP communication modules have some problems such as poor reusability and inefficiency. Reusability problem stems from the inherent characteristics of RTP that is framework is deliberately not complete, and so, RTP should have been designed and implemented in application-imbedded from. The RTP communication module, proposed in this paper, is designed and implemented in application-independent from in order to be used in all kinds of high level applications independent of their architectures and functions.

• Proceedings of the Korea Information Processing Society Conference
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• 2002.11a
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• pp.535-538
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• 2002

InfiniBand is a switched-fabric architecture for next generation I/O systems and data centers. The InfiniBand Architecture (IBA) promises to replace bus-based architectures, such as PCI, with a switched-based fabric whose benefits include higher performance, higher RAS (reliability, availability, scalability), and the ability to create modular networks of servers and shared I/O devices. The switched-fabric InfiniBand consists of InfiniBand subnets with channel adapters, switches, and routers. In order to fully grasp the operational characteristics of InfiniBand architecture (IBA) and use them in ongoing design specification, simulation of subnet management of IBA is inevitable. In this paper, thus, we implement an IBA simulator and test some practical sample networks using it. The simulator shows the flow of operation by which the correctness and effectiveness of the system can be verified.

• Journal of KIISE:Computing Practices and Letters
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• v.16 no.11
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• pp.1041-1045
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• 2010

Clusters can provide scalable and flexible architectures for parallel computing servers and data centers. Their performance prediction has been a very challenging issue. Existing performance measurement methodologies are able to measure the performance of servers already constructed. Thus they cannot provide a way to predict the overall system performance in advance when designing the system at the initial phase or adding more nodes for more capacity. Therefore, the performance modeling and prediction methodology for large-scale clusters is highly required. In this paper, we suggest a methodology to predict the performance of large-scale clusters, which consists of measurement, modeling and prediction steps. We apply the methodology to a real cluster server and show its usefulness.

• Journal of Information Processing Systems
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• v.10 no.4
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• pp.491-502
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• 2014

In this paper we present some research results on computing intensive applications using modern high performance architectures and from the perspective of high computational needs. Computing intensive applications are an important family of applications in distributed computing domain. They have been object of study using different distributed computing paradigms and infrastructures. Such applications distinguish for their demanding needs for CPU computing, independently of the amount of data associated with the problem instance. Among computing intensive applications, there are applications based on simulations, aiming to maximize system resources for processing large computations for simulation. In this research work, we consider an application that simulates scheduling and resource allocation in a Grid computing system using Genetic Algorithms. In such application, a rather large number of simulations is needed to extract meaningful statistical results about the behavior of the simulation results. We study the performance of Oracle Grid Engine for such application running in a Cluster of high computing capacities. Several scenarios were generated to measure the response time and queuing time under different workloads and number of nodes in the cluster.