• Title/Summary/Keyword: DVB-S

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Low Complexity Synchronizer Using Common Autocorrelator for DVB-S2 System

  • Park, Jang-Woong;SunWoo, Myung-Hoon;Kim, Pan-Soo;Chang, Dae-Ig
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.9 no.4
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    • pp.181-186
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    • 2009
  • This paper presents an efficient synchronizer architecture using a common autocorrelator for Digital Video Broadcasting via Satellite, Second generation (DVB-S2). To achieve the required performance under the worst channel condition and to implement the efficient H/W resource utilization of functional synchronization blocks, we propose a new efficient common autocorrelator structure. The proposed architecture can decrease about 92% of multipliers and 81% of adders compared with the direct implementation. Moreover, the proposed architecture has been thoroughly verified in XilinxTM Virtex IV and R&STM SFU (Signaling and Formatting Unit) broad-cast test equipment.

Trend of Terrestrial Digital Mobile Multimedia Broadcasting (지상파 디지털 이동멀티미디어 방송 동향)

  • Bae, J.H.;Lim, J.S.;Lee, S.I.
    • Electronics and Telecommunications Trends
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    • v.21 no.4 s.100
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    • pp.22-33
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    • 2006
  • 방송의 디지털 전환은 기존의 아날로그 방송에 비해 획기적으로 새로운 HD 화질과 3D입체음향의 방송 서비스가 가능하게 하였을 뿐만 아니라, 아날로그 방송에서는 불가능하였던 이동멀티미디어 방송이라는 새로운 서비스가 출현하게 하였다. 이동멀티미디어방송은 TV를 집 밖으로 이끌어내어 차를 타고 갈 때, 걸어갈 때 및 자리를 옮겨 다닐때도 휴대단말기를 통해서 언제 어디서나 원하는 TV 시청 및 음악 청취를 할 수 있는방송 서비스를 실현함으로써, 방송과 통신의 컨버전스를 유도하는 역할 및 나아가서 유비쿼터스 방송망 구성에 적용성을 제시하는 등 우리의 삶에 새로운 시대를 열어가고 있다. 현재 지상파 이동멀티미디어 방송 시스템은 세계적으로 매우 활발하게 연구 및 서비스가 추진중이며, 대표적인 예로는 크게 World DAB를 중심으로 한 T-DMB, DVB를 중심으로 한 DVB-H 그리고 Qualcomm을 중심으로 한 Media FLO 등이 있다. 본고에서는 지상파 이동멀티미디어 방송시스템에 대한 소개와 각 시스템의 표준화 및 서비스 추진 현황에 대해 소개한다.

A Low Power, Small Area Cyclic Time-to-Digital Converter in All-Digital PLL for DVB-S2 Application

  • Kim, Hongjin;Kim, SoYoung;Lee, Kang-Yoon
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.13 no.2
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    • pp.145-151
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    • 2013
  • In this paper, a low power, small area cyclic time-to-digital converter in All-Digital PLL for DVB-S2 application is presented. Coarse and fine TDC stages in the two-step TDC are shared to reduce the area and the current consumption maintaining the resolution since the area of the TDC is dominant in the ADPLL. It is implemented in a 0.13 ${\mu}m$ CMOS process with a die area of 0.12 $mm^2$. The power consumption is 2.4 mW at a 1.2 V supply voltage. Furthermore, the resolution and input frequency of the TDC are 5 ps and 25 MHz, respectively.

Studies on the Transmission Performance of Opencable and CVB-C (Opencable 방식과 DVB-C 방식의 전송성능에 관한 연구)

  • Lee, Jae-Ryun;Sohn, Won
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.27 no.2C
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    • pp.184-190
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    • 2002
  • This paper compares and analyzes and analyzes the transmission performance of the OpenCable system and the DBD-C system which are adopted as the digital CATV transmission standard in U.S.A. and Europe respectively through computer simulation under the same channel environment. We considered the channel environment including the random noise and the CTB (Composite Tripple Beats) noise as channel impairments in order to compare the two standard fairly. Additionally, we analyzed the transmission performance of the OpenCable system for the various interleaving depths. We implemented each transmission system by software, and we analyzed BER values with respect to the C/N in order to compare their transmission performance. As a result of the computer simulation, to get the BER of ${10}^{-6}$ the OpenCable system requires 1.2 dB kiwer C/N than the DVB-C system in the 64-QAM mode, and the two system require similar C/N in the 256-QAM mode.

Iterative Phase estimation based on Turbo code (터보부호를 이용한 반복 위상 추정기법)

  • Ryu, Joong-Gon;Heo, Jun
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.43 no.12 s.354
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    • pp.1-8
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    • 2006
  • In this paper, we propose carrier phase synchronization algorithm which are base on turbo coded system for DVB-RCS. There have been two categories of phase estimator, single estimator outside turbo code decoder and multiple estimators inside turbo code decoder. In single estimator, we use the estimation algorithm that ML(Maximum Likelihood) and LMS(Least Mean Square), also three different soft decision methods are proposed. Multiple estimator apply PSP(Per Survivor Processing) algorithm additionally. We compared performance between single estimator and Multiple estimator in AWGN channel. We presented the two methods of PSP algorithm for performance elevation. First is the Bi-directional channel estimation and second is binding method.

The Study of Hierarchical Transmission Method for Additional Service of Advanced T-DMB (차세대 T-DMB 방송의 부가서비스 제공을 위한 계층적 전송방식에 대한 연구)

  • Kim, Min-Hyuk;Park, Tae-Doo;Kim, Nam-Soo;Jung, Ji-Won;Lee, Seong-Ro;Choi, Myeong-Soo
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.33 no.12C
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    • pp.997-1005
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    • 2008
  • In this paper, we proposed advanced T-DMB system which is based on Eureka-147 using UEP coding methods and hiererchical modulation for providing additional services while maintaining BER performance. We simulated the proposed advanced T-DMB system using unequal l6QAM modulation scheme combined with various bit split methods and coding methods such as double binary turbo code of DVB-RCS standard and LDPC code of DVB-S2 standard. In the simulation results, double binary turbo code and LDPC code of proposed advanced T-DMB system have coding gain of 2dB and 3.5dB compared to conventional T-DMB system respectively.

Development of Satellite and Terrestrial Convergence Technology for Internet Services on High-Speed Trains (Service Scenarios) (고속열차대상의 위성인터넷 서비스 제공을 위한 위성무선연동 기술(서비스 시나리오 관점))

  • Shin, Min-Su;Chang, Dae-Ig;Lee, Ho-Jin
    • Journal of Satellite, Information and Communications
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    • v.2 no.2
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    • pp.69-74
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    • 2007
  • Recently, the demands for the satellite broadband mobile communication services are increased. To provide these services, mobile satellite communication systems for the passengers or crews on the high-speed moving vehicles, are being developed for the last several years especially in the Europe and North America. However, most of these systems can provide only several hundred kbps of transmission rate and this is not enough performance to provide satellite internet service for the group users such as passengers on the high-speed train. Moreover, service availability with these systems is limited to be rather low because they don't have any countermeasure scheme for the N-LOS environment which happens often along the railway. This paper describes mobile broadband satellite communication system, which is on the development, to provide high data-rate internet services to the high-speed trains. This system is applied with the inter-networking scenarios of both satellite/terrestrial network and satellite/gap-filler network so that it can provide seamless service even in the train operating environment, and these inter-networking schemes result in high service availability. And this system also has the countermeasure schemes, such as upper layer FEC and antenna diversity, for the short fading which is occurred periodically on the railway due to the power supplying structures so that it can provide high speed internet services. Mobile DVB-S2 technology which is now being standardized in the DVB is used for the forward-link transmission and DVB-RCS for the return-link.

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A High Speed LDPC Decoder Structure Based on the HSS (HSS 기반 초고속 LDPC 복호를 위한 구조)

  • Lee, In-Ki;Kim, Min-Hyuk;Oh, Deock-Gil;Jung, Ji-Won
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.38B no.2
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    • pp.140-145
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    • 2013
  • This paper proposes the high speed LDPC decoder structure base on the DVB-S2. Firstly, We study the solution to avoid the memory conflict. For the high speed decoding process the decoder adapts the HSS(Horizontal Shuffle Scheduling) scheme. Secondly, for the high speed decoding algorithm normalized Min-Sum algorithm is adapted instead of Sum-Product algorithm. And the self corrected is a variant of the LDPC decoding that sets the reliability of a Mc${\rightarrow}$v message to 0 if there is an inconsistency between the signs of the current incoming messages Mv'${\rightarrow}$c and the sign of the previous incoming messages Moldv'${\rightarrow}$c This self-corrected algorithm avoids the propagation on unreliable information in the Tanner graph and thus, helps the convergence of the decoder.Start after striking space key 2 times. Lastly, and this paper propose the optimal hardware architecture supporting the high speed throughput.

A Robust TDMA Frame Structure and Initial Synchronization in Satellite Communication (위성통신을 위한 강인한 TDMA Frame 구조 및 초기동기 기법)

  • Ko, Dong-Kuk;Yoon, Won-Sik
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.16 no.8
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    • pp.1631-1641
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    • 2012
  • A TDMA system in satellite communication has been utilized. Especially DVB-S2 was standardized and now operated in satellite broadcasting system. In this paper, we propose a TDMA frame structure appropriate for special purpose which has the good reliablilty in a poor RF environment even if frequency efficiency is decreased. TDMA frame duration is 12 seconds which is long duration in comparison with general TDMA system with several ms. Designing the frame structure, time and frequency shift in single frame duration are considered. Simulation results show that the proposed frame structure and synchronization method has robust synchronization performance when the terminal is even in low SNR as well as 25 kHz frequency offsets.

A Generator of 64~8,192-point FFT/IFFT Cores with Single-memory Architecture for OFDM-based Communication Systems (OFDM 기반 통신 시스템용 단일 메모리 구조의 64~8,192점 FFI/IFFFT 코어 생성기)

  • Yeem, Chang-Wan;Jeon, Heung-Woo;Shin, Kyung-Wook
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.14 no.1
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    • pp.205-212
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    • 2010
  • This paper describes a core generator (FCore_Gen) which generates Verilog-HDL models of 640 different FFT/IFFT cores with selected parameter value for OFDM-based communication systems. The generated FFT/IFFT cores are based on in-place single memory architecture and use a hybrid structure of radix-4 and radix-2 DIF algorithm to accommodate various FFT lengths. To achieve both memory reduction and the improved SQNR, a conditional scaling technique is adopted, which conditionally scales the intermediate results of each computational stage. The cores synthesized with a $0.35-{\mu}m$ CMOS standard cell library can operate with 75-MHz@3.3-V, and a 8,192-point FFT can be computed m $762.7-{\mu}s$, thus the cores satisfy the specifications of wireless LAN, DMB, and DVB systems.