• Journal of Korea Society of Digital Industry and Information Management
• /
• v.14 no.4
• /
• pp.93-99
• /
• 2018

This paper presents an implementation method using NDK (Network Developer's Kit) of GNU (GNU is Not Unix) Radio and Multicore DSP (Digital Signal Processor) to implement LTE (Long Term Evolution) SDR (Software Defined Radio) Platform. In order to satisfy 1.4MHz, 3MHz, 5MHz and 10MHz of the bandwidth supported by LTE, USRP (Universal Software Radio Peripheral) X series which is an RF (Radio Frequency) transceiver of Ettus Research was used. To control this, GNU Radio which is an open source software radio toolkit was used. We also used NDK from TI (Texas Instruments) DSP to transfer data between USRP and DSP. Experimental results show throughput results according to each bandwidth, thus confirming the feasibility of implementing LTE SDR Platform using GNU Radio and NDK of TI DSP.

• The Journal of the Acoustical Society of Korea
• /
• v.19 no.1
• /
• pp.78-83
• /
• 2000

Vocoders used in digital mobile phone adopt new improved algorithm to achieve better communication quality. Therefore the communication problem occurs between mobile phones using different vocoder algorithms. In this paper, the efficient implementation of 8kbps and 13kbps QCELP into one DSP chip to solve this problem is presented. We also describe the optimization method at each level, that is, algorithm-level, equation-level, and coding-level, to reduce the complexity for the QCELP vocoder algorithm implementation. The complexity in the codebook search-loop that is the main part for the QCELP algorithm complexity can be reduced about 50% by using these optimizations. The QCELP implementation with our DSP requires only 25 MIPS of computation for the 8kbps and 33 MIPS for the 13kbps ones. The DSP for our real-time implementation is a 16-bit fixed-point one specifically designed for vocoder applications and has a simple architecture compared to general-purpose ones in order to reduce the power consumption.

• The Journal of the Acoustical Society of Korea
• /
• v.22 no.4
• /
• pp.276-285
• /
• 2003

In this paper, we present real-time implementation of a R2MFC/DTMF (R2 Multi Frequency Combinations/Dual Tone Multiple Frequency) tone receiver/sender using a high performance DSP (Digital Signal Processor) and apply it to a carrier class VoIP (Voice over Internet Protocol) gateway system. The Receiver utilizes the Goertzel filter and the sender adopts the harmonic resonant filter. We describe, in detail, the techniques of multi-channel real-time implementation on a Texas Instruments TMS320C62x DSP such as effective PCM (Pulse Code Modulation) in/out by means of DMA (Direct Memory Access) and McBSP (Multi Channel Buffered Serial Port) and message communication via HPI (Host Port Interface), etc. From experimental results, we confirmed that the optimized code provided 780 channel capacity at 250㎒ C6202, and the our R2MFC/DTMF receiver/sender met ITU-T (International Telecommunication Union-Telecommunication) specifications.

• Speech Sciences
• /
• v.10 no.2
• /
• pp.65-75
• /
• 2003

This paper describes the issues associated with the real-time implementation of G.723.1A dual-rate speech coder on a TMS320VC5402 DSP. Firstly, the main features of the G.723.1A speech coder and the procedure involved in the implementation using assembly and C languages are discussed. Various real-time implementation issues such as memory/MIPS tradeoffs are also presented. For fixed-point implementation, we converted the ITU-T fixed-point ANSI C code into TMS320VC5402 code in the bit-exact way through verification using the test vectors. Finally, as the result of implementation, we present the MIPS and memory requirement for the real-time operation.

• The Journal of the Acoustical Society of Korea
• /
• v.19 no.7
• /
• pp.42-47
• /
• 2000

This paper describes a real-time implementation of a GSM-EFR (Global System for Mobil communications Enhanced Full Rate) speech coder using OakDSP core; a 16bit fixed-point Digital Signal Processor (DSP) by DSP Group, Inc. The real-time implemented speech coder required about 24MIPS for computation and 7.06K words and 12.19K words for code and data memory, respectively. The implemented GSM-EFR speech coder passes all of test vectors provided by ETSI (European Telecommunication Standard Institute), and perceptual speech quality measurement using MNB algorithm shows that the quality of the GSM-EFR speech coder is similar to the one of 32kbps ADPCM. The real-time implemented GSM-EFR speech coder which is the highest bit-rate mode of the GSM-AMR speech coder will be used as the basic structure of the GSM-AMR speech coder which is embedded in MODEM ASIC of IMT2000 asynchronous mode mobile station.

• Journal of the Korea Academia-Industrial cooperation Society
• /
• v.7 no.3
• /
• pp.325-331
• /
• 2006

This paper suggests the design methodology of a robust controller based on disturbance rejection controller using DSP. In this paper, we discuss process to put the disturbance rejection controller into practice, and examine the performance of disturbance rejection controller by implementing it on DSP based hardware to evaluate usefulness of controller. As a result, the proposed robust controller can not only stabilize system against disturbance ,but it improve controlling performance. And also, it shows convenient to put into practical use of industrial sites due to its easy implementation on the hardware.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.6 no.4
• /
• pp.246-251
• /
• 2006

In this paper, we introduce an implementation method of the CBS (Cycle Base Simulator), which describes the operation of a DSP (Digital Signal Processor) at a pipeline cycle level. The CBS is coded with C++, and is verified by comparing the results from the CBS and HDL simulation of the DSP with the various test vectors and application programs. The CBS shows the data about the internal registers, status flags, data bus, address bus, input and output pin of the DSP, and also the control signals at each pipeline cycle. The developed CBS can be used in evaluating the performance of the target DSP before the RTL(Register Transfer Level) coding as well as a reference for the RTL level design.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
• /
• v.11 no.8
• /
• pp.1428-1436
• /
• 2000

An adaptive predistorter linearizer suitable for the DSP implementation is proposed. Predistortion is performed by the DSP instead of the analog predistorter. RLS algorithm is employed for the optimization process to minimize the errors between the predistorter and postdistorter output signals. Computer simulation results for our linearizer show good performance.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.2 no.3
• /
• pp.335-341
• /
• 1998

In this paper, we present a real time implementation of CS-ACELP(Conjugate Structure Algebraic Code Excited Linear Prediction) speech coder. ITU-T has standardized the CS-ACELP algorithm as G.729. Areal-time implementation of CS-ACELP speech coder algorithm is achieved using 16 bit fixed-point DSP chip. To implement in fixed-point DSP Chip, integer simulation of CS-ACELP algorithm is used. Furthermore. input/output function and communication function included in CS-ACELP speech coder is described. We develope CS-ACELP speech coder in DSP evaluation board and evaluate in IMT-2000 Test-bed.

• Proceedings of the IEEK Conference
• /
• 1998.10a
• /
• pp.1211-1214
• /
• 1998

Real-time implementation of Conjugate-Structure Algebraic CELP(CS-ACELP) is presented. ITU-T Study Group(SG) 15 has standardized the CS-ACELP speech coding algorithm as G.729. A real-time implementation of the CS-ACELP is achieved using 16 bit fixed point DSP16210 Digital Signal Processor (DSP) of Lucent Technologies. The speech coder has been implemented in the bit-exact manner using the fixed point CS-ACELP C source which is the part of the G.729 standard. To provide a multi-channel vocoder solution to digital communication system, we try to minimize the complexity(e.g., MIPS, ROM, RAM) of CS-ACELP. Our speech coder shows 15.5 MIPS in performance which enables 4 channel CS-ACELP to be processed with one DSP16210.