• Title/Summary/Keyword: DSP 작업

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Interpolated Digital Delta-Sigma Modulator for Audio D/A Converter (오디오 D/A 컨버터를 위한 인터폴레이티드 디지털 델타-시그마 변조기)

  • Noh, Jinho;Yoo, Changsik
    • Journal of the Institute of Electronics and Information Engineers
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    • v.49 no.11
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    • pp.149-156
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    • 2012
  • A digital input class-D audio amplifier is presented for digital hearing aid. The class-D audio amplifier is composed of digital and analog circuits. The analog circuit converts a digital input to a analog audio signal (DAC) with noise suppression in the audio band. An interpolated digital delta-sigma modulator is used to convert data types between digital signal processor (DSP) and digital-to-analog converter (DAC). An 16-bit, 25-kbps pulse code modulated (PCM) input is interpolated to 16-bit, 50-kbps by a digital filter. The output signal of interpolation filter is noise-shaped by a third-order digital sigma-delta modulator (SDM). As a result, 1.5-bit, 3.2-Mbps signal is applied to simple digital to analog converter.

An Efficient 2-dimensional Addressing Mode for Image Processor (영상처리용 프로세서를 위한 효율적인 이차원 어드레스 지정 기법)

  • Go, Yun-Ho;Yun, Byeong-Ju;Kim, Seong-Dae
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.38 no.5
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    • pp.486-497
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    • 2001
  • In this paper, we propose a new addressing mode, which can be used for programmable image processor to perform image-processing algorithms effectively. Conventional addressing modes are suitable for one-dimensional data processing such as voice, but the proposed addressing mode consider two-dimensional characteristics of image data. The proposed instruction for two-dimensional addressing requires two operands to specify a pixel and doesn't require any change of memory architecture. The proposed two-dimensional addressing mode for image processor has the following advantages. The proposed instruction combines several instructions to load a pixel data from an external memory to a register. Hence, the proposed instruction reduces required code size so that it satisfies high performance and low power requirements of image processor. In addition, it uses inherent two-dimensional characteristics of image data and offers user-friendly instruction to assembler programmer The proposed two-dimensional addressing mode is applicable to DSP, media processor, graphic device, and so on. In this paper, we propose a new concept of two-dimensional addressing mode and an efficient hardware implementation method of it.

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Real-Time Implementation of MPEG-1 Layer III Audio Decoder Using TMS320C6201 (TMS320C6201을 이용한 MPEG-1 Layer III 오디오 디코더의 실시간 구현)

  • 권홍석;김시호;배건성
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.25 no.8B
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    • pp.1460-1468
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    • 2000
  • The goal of this research is the real-time implementation of MPEG-1 Layer III audio decoder using the fixed-point digital signal processor of TMS320C6201 The main job for this work is twofold: one is to convert floating-point operation in the decoder into fixed-point operation while maintaining the high resolution, and the other is to optimize the program to make it run in real-time with memory size as small as possible. We, especially, devote much time to the descaling module in the decoder for conversion of floating-point operation into fixed-point operation with high accuracy. The inverse modified cosine transform(IMDCT) and synthesis polyphase filter bank modules are optimized in order to reduce the amount of computation and memory size. After the optimization process, in this paper, the implemented decoder uses about 26% of maximum computation capacity of TMS320C6201. The program memory, data ROM, data RAM used in the decoder are about 6.77kwords, 3.13 kwords and 9.94 kwords, respectively. Comparing the PCM output of fixed-point computation with that of floating-point computation, we achieve the signal-to-noise ratio of more than 60 dB. A real-time operation is demonstrated on the PC using the sound I/O and host communication functions in the EVM board.

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A Study on the PI Controller of AC Servo Motor using Genetic Algorithm (유전자알고리즘을 이용한 교류서보전동기의 PI 제어기에 관한 연구)

  • Kim, Hwan;Park, Se-Seung;Choi, Youn-Ok;Cho, Geum-Bae;Kim, Pyoung-Ho
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.20 no.7
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    • pp.81-91
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    • 2006
  • Recently, G.A studies have studied and demonstrated that artificial intelligence like G.A networks, G.A PI controller. The design techniques of PI controller using G.A with the newly proposed teaming algorithm was presented, and the designed controller with AC servo motor system. The goal of this paper is to design the AC servo motor using genetic algorithm and to control drive robot. And in this paper, we propose a genetic algorithms approach to find an optimal or near optimal input variables for genetic algorithm PI controller. Our experimental results show that this approach increases overall classification accuracy rate significantly. Finally, we executed for the implementation of high performance speed control system. It is used a 16-bit DSP, IMS320LF2407, which is capable of the high speed and floating point calculation.