• Title/Summary/Keyword: DSP

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Implementation of a Flexible Intelligent Electronic Device(IED) platform based on The Network processor (Network processor 기반 유연 Intelligent Electronic Device(IED) 플랫폼 구현)

  • Jeon, Hyeon-Jin;Lee, Wan-Gyu;Chang, Tae-Gyu
    • Proceedings of the KIEE Conference
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    • 2006.04a
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    • pp.255-257
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    • 2006
  • This paper proposed a platform which includes both Network processor and DSP for flexible IED. The Network processor is one of the Intel's IXP4XX Product Line family and the DSP is one of the TI's C6000 family. An embedded Linux is ported in Network processor so that a DSP program can be downloaded to Network processor through ethernet and then downloaded to DSP. Using this method, various algorithms according to IED can be applied to the Network processor board. Maximum ten ADCs can be connected because there is a CPLD between DSP and ADC. That is, the network processor board which can measure maximum 40 channels is implemented. In DSP program, thread and double buffering methods are used not to miss voltage samples. The Network processor board is verified using a method that eight channel voltage signals converted to digital are transmitted to server through both DSP and IXP425.

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Implementation of a Speaker-independent Speech Recognizer Using the TMS320F28335 DSP (TMS320F28335 DSP를 이용한 화자독립 음성인식기 구현)

  • Chung, Ik-Joo
    • Journal of Industrial Technology
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    • v.29 no.A
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    • pp.95-100
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    • 2009
  • In this paper, we implemented a speaker-independent speech recognizer using the TMS320F28335 DSP which is optimized for control applications. For this implementation, we used a small-sized commercial DSP module and developed a peripheral board including a codec, signal conditioning circuits and I/O interfaces. The speech signal digitized by the TLV320AIC23 codec is analyzed based on MFCC feature extraction methed and recognized using the continuous-density HMM. Thanks to the internal SRAM and flash memory on the TMS320F28335 DSP, we did not need any external memory devices. The internal flash memory contains ADPCM data for voice response as well as HMM data. Since the TMS320F28335 DSP is optimized for control applications, the recognizer may play a good role in the voice-activated control areas in aspect that it can integrate speech recognition capability and inherent control functions into the single DSP.

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Digital Hearing Aid DSP Chip Parameter Fitting Optimization (디지털 보청기 DSP Chip 파라미터 적합 최적화)

  • Jarng Soon-Suck
    • Journal of Institute of Control, Robotics and Systems
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    • v.12 no.6
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    • pp.530-538
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    • 2006
  • DSP chip parameters of a digital hearing aid (HA) should be optimally selected or fitted for hearing impaired persons. The more precise parameter fitting guarantees the better compensation of the hearing loss (HL). Digital HAs adopt DSP chips for more precise fitting of various HL threshold curve patterns. A specific DSP chip such as Gennum GB3211 was designed and manufactured in order to match up to about 4.7 billion different possible HL cases with combination of 7 limited parameters. This paper deals with a digital HA fitting program which is developed for optimal fitting of GB3211 DSP chip parameters. The fitting program has completed features from audiogram input to DSP chip interface. The compensation effects of the microphone and the receiver are also included. The paper shows some application examples.

DSP Firmware Update Using USB Flash Drive (USB 플래시 드라이브를 이용한 DSP 펌웨어 업데이트)

  • Jin-Sun Kim;Joon-Young Choi
    • IEMEK Journal of Embedded Systems and Applications
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    • v.18 no.1
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    • pp.25-30
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    • 2023
  • We propose a method to update DSP (Digital Signal Processor) firmware using USB (Universal Serial Bus) flash drives. The DSP automatically detects USB drives based on an interrupt when the USB drive is inserted into the USB port. The new firmware binary file is found in the mounted USB drive, and the destination address of DSP flash memory is identified for the firmware update writing by investigating the firmware file header. After the new firmware is written to the DSP flash memory, the DSP is reset and rebooted with the newly updated firmware. By employing TI's TMS320F28379D control card with USB ports, we conduct experiments and verify the normal operation of the implemented method.

Design of the DSP for the FM Sound Synthesis (FM 합성방식을 이용한 악기음 합성용 DSP 설계)

  • Kwon, Min-Do;Jang, Ho-Keun;Kim, Jae-Yong;Park, Ju-Sung;Kim, Hyung-Soon;Yun, Pyung-Woo;Baek, Kwang-Ryul;Im, Chang-Hun
    • The Journal of the Acoustical Society of Korea
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    • v.14 no.5
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    • pp.63-73
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    • 1995
  • The conventional acoustic sounds can be synthesized by Frequency Modulation which includes the variation of frequency, amplitude, and modulation index. In this paper the number of variable synthesis parameters are limited to easily implement the existing two carrier FM algorithm by hardware. The DSP(Digital Signal Processor), which is able to carry out the modified algorithm and synthesize 16 sounds at a time, is designed with $0.8{\mu}m$ standard sells. The DSP which can synthesize 2 sounds at a time is implemented by ASIC emulator to examine the sound quality of the designed DSP. Through the objective and subjective estimation, it is confirmed that the sounds of many instruments from the implemented DSP are very closed to their real sound. Finally the designed DSP is layouted and simulated by VLSI desgn tool. According to the simulation, the designed DSP has the sufficiently fast speed for synthesizing 16 sounds at a time.

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A Method on Reconfiguring job priority in Service Queue for Enhancing Operability of e-Navigation Data Service Platform (한국형 e-Navigation 대용량 데이터 처리 플랫폼의 운용성 증대를 위한 서비스 응답 큐의 우선순위 재구성 기법)

  • Kim, Myeong-hun;Kang, Moon-seog
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2018.10a
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    • pp.217-219
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    • 2018
  • The method on reconfiguring job priority in service queue has been developed to provide seamless service and to enhance operability of Data Service Platform(DSP) in Korean e-Navigation project that performed by Ministry of Oceans and Fisheries(MOF) since 2016. It plays a critical role for providing seamless services of DSP to expect which services ships request to DSP and how much time it costs to make services for responding them to ships in advance. Therefore, as developing a method on reconfiguring jobs in service queue of DSP with a noble algorithm to analyse priority index in parallel, DSP can provide seamless services to ships regardless of data volume and the number of requests that stacked in service queue.

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Synchronization Algorithm and Demodulation using the Phase Transition Detection in the DSP based MPSK Receiver (DSP 기반 MPSK 수신기에서 위상천이 검출을 이용한 동기 알고리즘과 복조)

  • Lee Jun-Seo;Maing Jun-Ho;Ryu Heung-Gyoon;Park Cheol-Sun;Jang Won
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.15 no.10 s.89
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    • pp.952-960
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    • 2004
  • PSK(Phase Shift Keying) is useful because of the power and spectral efficient modulation. In this paper, no additional hardware will be needed to support various transmit mode in the suggested DSP scheme. We design and implement the synchronization algorithm for M-ary PSK(M=2, 4) demodulator based on DSP scheme, instead of complex analog PSK demodulator. TMS320C6203 is used as DSP. We check the all kinds of waveforms via the graph view window after software programming the emulation on the DSP tool. The result of implementation proves that demodulator using the suggested algorithm has equal performance with demodulator using analog circuits.

A DSP Platform for the HD Multimedia Streaming (HD급 멀티미디어 Streaming을 위한 DSP 플랫폼)

  • Hong, Keun-Pyo;Park, Jong-Soon;Moon, Jae-Pil;Kim, Dong-Hwan;Chang, Tae-Gyu
    • Proceedings of the IEEK Conference
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    • 2005.11a
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    • pp.569-572
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    • 2005
  • This paper proposed the design and implementation of a DSP platform for the various multimedia streaming. The DSP platform synchronizes with host PC to configure DSP and to transmit multimedia streaming through PCI. The suggested DSP platform decodes high-capacity video/audio data using the suggested high-speed FIFO, CPLD and memory interface. The buffer control techniques is proposed in other to avoid the under/over-run of the audio/video data during the audio/video decoding. For the DSP platform test, host PC transmits program stream(PS) that consists of the MPEG-2 video MP@ML and 5.1ch AC3 audio data (Coyote.mov file, half hour running time) to DSP platform. The DSP platform plays continuously back the high sound-quality audio and high-definition video at once.

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Real-time Implementation of Multi-channel AMR Speech Coder (멀티채널 AMR 음성부호화기의 실시간 구현)

  • 지덕구;박만호;김형중;윤병식;최송인
    • The Journal of the Acoustical Society of Korea
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    • v.20 no.8
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    • pp.19-23
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    • 2001
  • DSP-based implementation is pervasive in wireless communication parts for systems and handsets according to developing high-speed and low-power programmable Digital Signal Processor (DSP). In this paper, we present a real-time implementation of multi-channel Adaptive Multi-rate (AMR) speech coder. The real-time implementation of an AMR algorithm is achieved using 32-bit fixed-point TMS320C6202 DSP chip that operates at 250 MHz. We performed cross compile, linear assembly optimization and TMS320C62xx assembly optimization for real-time implementation. Furthermore, speech data input/output function and communication function with external CPU is included in an AMR speech coder. The AMR Speech coder developed using DSP EVM board was evaluated in ETRI IMT-2000 Test-bed system.

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DSP Optimization for Rain Detection and Removal Algorithm (비 검출 및 제거 알고리즘의 DSP 최적화)

  • Choi, Dong Yoon;Seo, Seung Ji;Song, Byung Cheol
    • Journal of the Institute of Electronics and Information Engineers
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    • v.52 no.9
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    • pp.96-105
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    • 2015
  • This paper proposes a DSP optimization solution of rain detection and removal algorithm. We propose rain detection and removal algorithms considering camera motion, and also presents optimization results in algorithm level and DSP level. At algorithm level, this paper utilizes a block level binary pattern analysis, and reduces the operation time by using the fast motion estimation algorithm. Also, the algorithm is optimized at DSP level through inter memory optimization, EDMA, and software pipelining for real-time operation. Experiment results show that the proposed algorithm is superior to the other algorithms in terms of visual quality as well as processing speed.