• Journal of Power Electronics
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• v.11 no.2
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• pp.113-119
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• 2011

This paper presents a DSP based direct digital control design and implementation for a high power boost converter. A single loop and dual loop voltage control are digitally implemented and compared. The real time workshop (RTW) is used for automatic real-time code generation. Experimental results of a 20 kW boost converter based on the TMS320F2808 DSP during reference voltage changes, input voltage changes, and load disturbances are presented. The results show that the dual loop control achieves better steady state and transient performance than the single loop control. In addition, the experimental results validate the effectiveness of using the RTW for automatic code generation to speed up the system implementation.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.4 no.2
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• pp.63-70
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• 2003

In this paper, an MFC (Mass Flow Controller) which is widely used in many semiconductor manufacturing processes for controlling the mass flow rate of a gas is designed and implemented using the PIC 16F876 of Microchip, Inc. The MFC implemented in this thesis has the form of hybrid-type, i.e., the mixed-type of the analog-type MFC, which has many problems such as low accurary, and digital-type MFC, which use an expensive DSP (Digital Signal Processor) and an ADC (Analog to Digital Convertor) with high precision. The MFC is consists of the sensor unit, the control unit and the actuator unit, and it has used the automatic calibration algorithm and the reference table method for the improvement of the performance.

• Journal of Electrical Engineering and Technology
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• v.10 no.4
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• pp.1655-1666
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• 2015

This paper proposes a new approach of Field Programmable Gate Array (FPGA) controlled digital implementation of shunt active power filter (SAPF) under steady state and dynamic operations. Typical implementations of SAPF uses microprocessor and digital signal processor (DSP) but it limited for complex algorithm structure, absence of feedback loop delays and their cost can be exceed the benefit they bring. In this paper, the hardware resources of an FPGA are configured and implemented in order to overcome conventional microcontroller or digital signal processor implementations. This proposed FPGA digital implementation scheme has very less execution time and boosts the overall performance of the system. The FPGA controller integrates the entire control algorithm of an SAPF, including synchronous reference frame transformation, phase locked loop, low pass filter and inverter current controller etc. All these required algorithms are implemented with a single all-on chip FPGA module which provides freedom to reconfigure for any other applications. The entire algorithm is coded, processed and simulated using Xilinx 12.1 ISE suite to estimate the advantages of the proposed system. The coded algorithm is also defused on a single all-on-chip Xilinx Spartan 3A DSP-XC3SD1800 laboratory prototype and experimental results thus obtained match with simulated counterparts under the dynamic state and steady state operating conditions.

• The Transactions of the Korean Institute of Power Electronics
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• v.12 no.4
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• pp.339-345
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• 2007

This paper presents a design of an FPGA (Field Programmable Gate Array) -based currentcontroller. Using the nature of the high computational capability of FPGA, the digital delay due to the algorithm execution can be reduced. The control performance can be better than the conventional DSP (Digital Signal Processor)-based current controller. Moreover, this method does not need any delay compensation algorithm because the digital delay is physically diminished. Therefore, the bandwidth of the current controller can be extended by this method. The feasibility of this method is verified by several experimental results under the various conditions.

• Journal of Broadcast Engineering
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• v.8 no.2
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• pp.116-125
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• 2003

In this paper, we introduce a newly developed DSP module and Software which Is applicable to DTV-OCR and is designed to cancel the interference signal. In general, RF repeater has problems of system oscillation and signal Quality degradation due to feedback interference signal coming from transmit antenna. In this paper, we demonstrate newly developed DSP HW and SW module for cancelling the interference signal by investigating the field data measured through a RF repeater. Also, the structure and signal processing method for non-regenerative repeater system based on the newly developed DSP HW and SW module is illustrated as well.

• 제어로봇시스템학회:학술대회논문집
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• 1990.10b
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• pp.1032-1036
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• 1990

This paper describes a system which enables a real-time measurement of 2-D water flow field. One distinctive feature of our system is that velocity vectors of water flow are obtained from the movement of tracer particles at video rate. In order to enable a fast measurement a real time video processor and two Digital Signal Processor(TMS32OC25) are employed. The real-time video processor extracts contours of tracer particles in order to reduce the amount of image data to be processed. And two DSP(Digital Signal Processor) analyse the correlation of every tracer paticle in the consecutive two images to obtain the velocity distribution of water flow.

• The Journal of the Acoustical Society of Korea
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• v.22 no.4
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• pp.276-285
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• 2003

In this paper, we present real-time implementation of a R2MFC/DTMF (R2 Multi Frequency Combinations/Dual Tone Multiple Frequency) tone receiver/sender using a high performance DSP (Digital Signal Processor) and apply it to a carrier class VoIP (Voice over Internet Protocol) gateway system. The Receiver utilizes the Goertzel filter and the sender adopts the harmonic resonant filter. We describe, in detail, the techniques of multi-channel real-time implementation on a Texas Instruments TMS320C62x DSP such as effective PCM (Pulse Code Modulation) in/out by means of DMA (Direct Memory Access) and McBSP (Multi Channel Buffered Serial Port) and message communication via HPI (Host Port Interface), etc. From experimental results, we confirmed that the optimized code provided 780 channel capacity at 250㎒ C6202, and the our R2MFC/DTMF receiver/sender met ITU-T (International Telecommunication Union-Telecommunication) specifications.

• Proceedings of the Korean Society of Marine Engineers Conference
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• 2006.06a
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• pp.207-208
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• 2006

기존의 음향측심기는 복잡한 하드웨어 구조로 인해 크기와 중량이 큰 단점이 있었다. 이에 본 개발에서는 이러한 단점을 보완하기 위해 고속의 단일칩을 적용하여 단순구조의 하드웨어로 구성하였으며, 그 결과 장비의 크기 및 중량을 감소시킬 수 있었고 또 신호처리 기법을 적용하여 측정 데이터의 안정성을 획득 하였다.

• Journal of the Korea Institute of Military Science and Technology
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• v.9 no.1 s.24
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• pp.109-116
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• 2006

This paper presents a real time distance measuring device using a W-band linear frequency modulated continuous wave(FMCW) radar and TMS320C6701 digital signal processor(DSP). We used FFT operation for measuring distance with the beat signals and the results of FFT could be converted to distance with ease. We presented how to implement a real time miniaturized hardware system including network protocols using a single DSP core. Also how to control the modulation signal of FMCW system to compensate the VCO nonlinearity using the Time Gating control of DSP is presented. We have shown that the proposed system has good performances for measuring distance in real time via outdoor environment experiments.

• Proceedings of the IEEK Conference
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• 2000.11d
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• pp.187-190
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• 2000

In this paper, implementation of speech Recognizer system, Separated from Personal computer. By using DSP, this intends to extend the voice recognizing, limited into PC because of amount of data and calculations. For this performance The thesis uses the real time End point detector and organizes no additional device between human and the system, characteristic vector are that detects End point and voice from absolute energy and ZCR, that uses 12 difference Cepstrum from LPC, that uses the method to compensate the process of pattern separating and pre-calculated standard pattern limitation.