• Proceedings of the Korea Institutes of Information Security and Cryptology Conference
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• 2006.06a
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• pp.159-163
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• 2006

1999년 P.Kocher에 의해 전력분석공격에 대한 연구결과가 발표된 이후, 부채널 공격에 의한 많은 암호장치들의 취약성 및 대응방법들에 대한 연구가 이루어지고 있다. 지금까지 제안된 대응방법중 마스킹 기법이 소프트웨어적으로 구현하는데 가장 효율적이다. 하지만, 최근 마스킹이 적용될 AES에 대한 효율적인 2차 DPA 공격결과가 발표되었다. 본 논문에서는 마스킹이 적용된 국가표준암호 ARIA를 대상으로 2차 DPA 공격을 성공적으로 수행하였다.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.49 no.3
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• pp.74-80
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• 2012

Recently at SCIS2011, Nakatsu et. al. proposed multi-round Correlation Power Analysis(CPA) on Hardware Advanced Encryption Standard(AES) to improve the performance of CPA with limited number of traces. In this paper, we propose, Multi-Round CPA to retrieve master key using CPA of 1round and 2round on Hardware DES. From the simulation result for the proposed attack method, we could extract 56-bit master key using the 300 power traces of Hardware DES in DPA contes. And it was proved that we can search more master key using multi-round CPA than using single round CPA in limited environments.

• The KIPS Transactions:PartC
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• v.18C no.4
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• pp.213-216
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• 2011

Differential Power Analysis is fully affected by various noises including temporal misalignment. Recently, Ryoo et al have introduced an efficient preprocessor method leading to improvements in DPA by removing the noise signals. This paper experimentally proves that the existing preprocessor method is not applied to all processor. To overcome this defect, we propose a Differential Trace Model(DTM). Also, we theoretically prove and experimentally confirm that the proposed DTM suites DPA.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.23 no.3
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• pp.561-566
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• 2013

We propose an efficient exponentiation method which is resistant against some side channel attacks in $T_2(p)$, Torus-Based-Cryptosystem. It is more efficient than the general exponentiation method in $T_2(p)$ and is resistant against SPA by using that the difference of squaring and multiplication costs is negligible. Moreover, we can randomize a message in exponentiation step using the characteristic of quotient group which naturally protects against the first DPA.

• ETRI Journal
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• v.32 no.1
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• pp.166-168
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• 2010

We investigate the possibility of using adiabatic logic as a countermeasure against differential power analysis (DPA) style attacks to make use of its energy efficiency. Like other dual-rail logics, adiabatic logic exhibits a current dependence on input data, which makes the system vulnerable to DPA. To resolve this issue, we propose a symmetric adiabatic logic in which the discharge paths are symmetric for data-independent parasitic capacitance, and the charges are shared between the output nodes and between the internal nodes, respectively, to prevent the circuit from depending on the previous input data.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2014.05a
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• pp.221-223
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• 2014

Power analysis attack on cryptographic hardware device aims to study the power consumption while performing operations using secrets keys. Power analysis is a form of side channel attack which allow an attacker to compute the key encryption from algorithm using Simple Power Analysis (SPA), Differential Power Analysis (DPA) or Correlation Power Analysis (CPA). The theoretical weaknesses in algorithms or leaked informations from physical implementation of a cryptosystem are usually used to break the system. This paper describes how power analysis work and we provide an overview of countermeasures against power analysis attacks.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.17 no.5
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• pp.55-63
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• 2007

This paper has investigated the susceptibility of an FPGA implementation of a block cipher against side channel analysis attacks. We have performed DPA attacks and DEMA attacks (in the nea. and far field) on an FPGA implementation of ARIA which has been implemented into two architectures of S-box. Although the number of needed traces for a successful attack is increased when compared with existing results on smart cards, we have shown that ARIA without countermeasures is indeed very susceptible to side channel analysis attacks regardless of an architecture of S-box.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.16 no.4
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• pp.59-68
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• 2006

Although the cryptographic algorithms in IC chip such as smart card are secure against mathematical analysis attack, they are susceptible to side channel attacks in real implementation. In this paper, we analyze the security of smart card using a developed experimental tool which can perform power analysis attacks and fault insertion attacks. As a result, raw smart card implemented SEED and ARIA without any countermeasure is vulnerable against differential power analysis(DPA) attack. However, in fault attack about voltage and clock on RSA with CRT, the card is secure due to its physical countermeasures.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.27 no.5
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• pp.1001-1011
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• 2017

A lattice-based cryptography is known as one of the post-quantum cryptographies. Ring-LWE problem is an algebraic variant of LWE, which operates over elements of polynomial rings instead of vectors. It is already known that post-quantum cryptography has side-channel analysis vulnerability. In 2016, Park et al. reported a SPA vulnerability of the public key cryptosystem, which is proposed by Roy et al., based on the ring-LWE problem. In 2015 and 2016, Reparaz et al. proposed DPA attack and countermeasures against Roy cryptosystem. In this paper, we show that the chosen ciphertext SPA attack is also possible for Lyubashevsky cryptosystem which does not use NTT. And then we propose a countermeasure against CCSPA(Chosen Ciphertext SPA) attack and we also show through experiment that our proposed countermeasure is secure.

• KIPS Transactions on Computer and Communication Systems
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• v.8 no.9
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• pp.225-230
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• 2019

Recently, with the development of Internet technology, various encryption algorithms have been adopted to protect the sensing data measured by hardware devices. The Advanced Encryption Standard (AES), the most widely used encryption algorithm in the world, is also used in many devices with strong security. However, it has been found that the AES algorithm is vulnerable to side channel analysis attacks such as Differential Power Analysis (DPA) and Correlation Power Analysis (CPA). In this paper, we present a software optimization implementation technique of the AES algorithm applying the most widely known masking technique among side channel analysis attack methods.