Browse > Article
http://dx.doi.org/10.13089/JKIISC.2007.17.5.55

Differential Side Channel Analysis Attacks on FPGA Implementations of ARIA  

Kim, Chang-Kyun (National Security Research Institute)
Yoo, Hyung-So (Kyungpook National University)
Park, Il-Hwan (National Security Research Institute)
Abstract
This paper has investigated the susceptibility of an FPGA implementation of a block cipher against side channel analysis attacks. We have performed DPA attacks and DEMA attacks (in the nea. and far field) on an FPGA implementation of ARIA which has been implemented into two architectures of S-box. Although the number of needed traces for a successful attack is increased when compared with existing results on smart cards, we have shown that ARIA without countermeasures is indeed very susceptible to side channel analysis attacks regardless of an architecture of S-box.
Keywords
ARIA; FPGA; DPA; DEMA;
Citations & Related Records
Times Cited By KSCI : 3  (Citation Analysis)
연도 인용수 순위
1 유형소, 하재철, 김창균, 박일환, 문상재, '저메모리 환경에 적합한 마스킹기반의 ARIA 구현,' 한국정보보호학회논문지, vol.16, no.3, pp. 143-155, 2006   과학기술학회마을
2 Daesung Kwon et al., 'New Block Cipher ARIA,' ICISC'02, LNCS 2971, pp. 541-548, Springer-Verlag, 2002
3 M. Hutter, EM Side-Channel Attacks on Cryptographic Devices, Master thesis, Graz University of Technology, 2006
4 S. Mangard, 'Hardware Counter- measures against DPA-A Statistical Analysis of Their Effectiveness,' CT-RSA'04, LNCS 2964, pp. 222-235, Springer-Verlag, 2004
5 K. Gandolfi, C. Mourtel, and F. Olivier, 'Electromagnetic Analysis:Concrete Results,' CHES'01, LNCS 2162, pp. 251-261, Springer-Verlag, 2001
6 H. Yoo, C. Herbst, S. Mangard, E. Oswald, and S. Moon, 'Investigations of Power Analysis ARIA,' WISA'06, LNCS 4298, Springer-Verlag, 2007
7 유형소, 하재철, 김창균, 박일환, 문상재, '랜덤마스킹 기법을 이용한 DPA 공격에 안전한 ARIA 구현,' 한국정보보호학회논문지, vol.16, no.2, pp. 129-139, 2006   과학기술학회마을
8 S. Ors, E. Oswald and B. Preneel, 'Power-Analysis Attacks on an FPGA-First Experimental Results,' CHES'03, LNCS 2779, pp. 35-50, Springer-Verlag, 2003
9 서정갑, 김창균, 하재철, 문상재, 박일환, '블럭암호 ARIA에 대한 차분전력분석공격,' 한국정보보호학회논문지, vol.15, no.1, pp.99-107, 2005   과학기술학회마을
10 S. Ors, F. Grkaynak, E. Oswald, and B. Preneel, 'Power Analysis Attack on an ASIC AES Impelementation,' ITCC, Vol.2, pp. 546-552, 2004
11 S. Yang, J. Park, and Y. You, 'The Smallest ARIA Module with 16-Bit Architecture,' ICISC'06, LNCS 4296, pp.107-117, Springer-Verlag, 2006
12 F. Standaert, S. Ors and B. Preneel, 'Power Analysis of an FPGA Implementation of Rijndael:Is Pipelining a DPA Countermeasure,' CHES'04, LNCS 3156, pp. 30-44, Springer-qVerlag, 2004
13 A. Satoh and S. Morioka, 'Unified Hardware Architecture for 128-bit Block Cipher AES and Camellia,' CHES'03, LNCS 2779, pp.304-318, Springer-Verlag, 2003
14 P. Kocher, J. Jaffe and B.Jun, 'Differential Power Analysis,' CRYPTO'99, LNCS 1666, pp.388-397, Springer-Verlag, 1999
15 J. Ha, C. Kim, S. Moon, I. Park, and H. Yoo, 'Differential Power Analysis on Block Cipher ARIA,' HPCC'05, LNCS 3726, pp. 541-548, Springer-Verlag, 2005
16 A. Satoh, S. Morioka, K. Takano and S. Munetoh, 'A Compact Rijndael Hardware Architecture with S-Box Optimization,' ASIACRYPT'01, LNCS 2248, pp. 239-254, Springer-Verlag, 2001