• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.11
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• pp.54-61
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• 2003

In this paper, an efficient non-scan design-for-testability (DFT) method for controller circuits is proposed. The proposed method always guarantees a short test pattern generation time and complete fault efficiency. It has a lower area overhead than full-scan and other non-scan DFT methods and enables to apply test patterns at-speed. The proposed method also shortens the test application time through a test pattern re-ordering procedure. The efficiency of the proposed method is demonstrated using well known MCNC'91 FSM benchmark circuits.

• Journal of Internet Computing and Services
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• v.4 no.3
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• pp.31-37
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• 2003

In this paper, an efficient non-scan design-for-testability (DFT) method for finite state machine(FSM) is proposed. The proposed method always guarantees short test pattern generation time and complete fault efficiency. It has a lower area overhead than full-scan and other non-scan DFT methods and enables to apply test patterns at-speed. The efficiency of the proposed method is demonstrated using well-known MCNC'91 FSM benchmark circuits.

• Journal of Communications and Networks
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• v.1 no.2
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• pp.86-88
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• 1999

The Discrete Fourier Transform (DFT) and the Inverse Discrete Fourier Transform (IDFT) are commonly used in signal processing applications, in particular in digital communication sys-tems using the multi-carrier modulation principle. In such systems an IDFT is computed at the transmitter end, and a DFT at the re-ceiver end. This paper examines a technique of computations, for which only negligible differences appear between the DFT and the IDFT calculations while the number of arithmetic operations re-quired is substantially reduced. This offers significant advantages for the design of an IDFT/DFT processor for Discrete Multitone(DMT) systems.

• The Transactions of the Korean Institute of Electrical Engineers D
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• v.50 no.12
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• pp.584-589
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• 2001

This paper presents an implementation method of multi-channel synchronized phasor measurement device, which is based on the ASIC implementation of the sliding-DFT. A time-shared multiplier structure is proposed to minimize the number of gates required for the implementation. The design is verified by the timing simulation of its operation. The effect of coefficient approximation in the recursive implementation of the sliding-DFT is analytically derived and verified with the computer simulations.

• ETRI Journal
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• v.25 no.5
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• pp.345-355
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• 2003

In this paper, we propose a method for designing a class of M-channel, causal, stable, perfect reconstruction, infinite impulse response (IIR), and parallel uniform discrete Fourier transform (DFT) filter banks. It is based on a previously proposed structure by Martinez et al. [1] for IIR digital filter design for sampling rate reduction. The proposed filter bank has a modular structure and is therefore very well suited for VLSI implementation. Moreover, the current structure is more efficient in terms of computational complexity than the most general IIR DFT filter bank, and this results in a reduced computational complexity by more than 50% in both the critically sampled and oversampled cases. In the polyphase oversampled DFT filter bank case, we get flexible stop-band attenuation, which is also taken care of in the proposed algorithm.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.57 no.2
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• pp.102-108
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• 2008

AC generator plays an important role of power system. The large AC generator fault may lead to large impacts or perturbations in power system. And then the protection of a generator has very important role in maintaining stability in a power system. In present, the DFT(discrete Fourier transform) based RDR(ratio differential relay) had been widely applied to a internal fault of a generator stator winding. But DFT has a serious drawback. In the course of transforming a target signal to frequency domain, time information is lost. DWT uses a time-scale region. This paper proposes an advanced fault detection algorithm using DWT(discrete Wavelet transform) to enhance the drawback of conventional DFT based relaying. To evaluate the performance of the proposed relaying, we used the test data which were sampled with 720 [Hz] per cycle and obtained from ATP(alternative transient program) simulation. And we made a comparative study of conventional DFT based RDR and the proposed relaying.

• Proceedings of the KIEE Conference
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• 2007.10a
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• pp.157-158
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• 2007

본 논문에서는 산업전반에 걸쳐 널리 사용되는 유도전동기의 고장상태를 검출하기 위해 DFT(Discreet Fourier Transform)와 LDA에 기반을 둔 진단 알고리즘을 제안하고자 한다. 실험에 의해 측정된 전류값을 DFT에 의해 시간공간에서 주파수 공간으로 변환한 후에 LDA기법을 이용하여 특징벡터를 산출한 후 거리 유사도에 의해 진단이 수행된다. 제안된 방법의 타당성을 보이기 위해 여섯 가지의 고장을 대상으로 다양한 조건하에서 실험한 결과 기존 방법에 비교하여 우수한 결과를 나타냈다.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2006.05a
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• pp.902-905
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• 2006

This paper presents a new RF testing scheme based on a design-for-testability (DFT) method for measuring functional specifications of RF integrated circuits (IC). The proposed method provides input impedance. gain, noise figure. input voltage standing wave ratio (VSWR) and output signal-to-noise ratio (SNR) of a low noise amplifier (LNA). The RF test scheme is based on theoretical expressions that produce the actual RF device specifications by output DC voltages from the DR chip.

• Journal of the korean academy of Pediatric Dentistry
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• v.26 no.1
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• pp.1-13
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• 1999

To study the caries patterns in primary dentition, 719 preschool children, 4-6 years old, were examined for their caries activity(salivary reductase activity) and caries experience of individual teeth. Teeth groups were made by cluster analysis using dft indexes of individual teeth as criteria. The six major teeth groups in the order of dft index from high to low were (1) lower primary molars, (2) upper primary molars, (3) upper central incisor, (4) upper lateral incisor, (5) canines, and (6) lower incisors. There were significant differences in dft index between teeth groups except upper lateral incisor and canines. Upper and lower primary molars showed the highest correlation in dft index, and the next couples were upper central incisors and upper lateral incisors, upper lateral incisor and canines, upper central incisor and canines, upper lateral incisor and upper primary molars, and canines and upper primary molars in descending order. Upper first primary molar showed the greatest differences in dft index between caries activity levels.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.45 no.6
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• pp.141-148
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• 2008

An utility voltage information, including the frequency, phase angle and amplitude is very important in many industrial systems. The grid-connected photovoltaic system in the limelight as alternative energy needs utility voltage information such as frequency, phase angle and magnitude to connect the grid-line. In this paper, it proposes the instantaneous phase-tracking in PLL that uses the frequency from the utility voltage as a sync signal and locks the phase with compensation for phase difference from DPT algorithm. It also proposes not only DFT algorithm execution by every sample not by one period, but also phase-tracking method in a wide range of frequency not a fixed one. This paper shows the feasibility and the usefulness of the proposed methods through the computer simulation and the experiment.