• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.26 no.5
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• pp.521-524
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• 2015

This letter presents a selective wireless power transfer architecture using a reconfigurable multi-port amplifier. The proposed wireless power transfer architecture is composed of a phase shifter part controlled by FPGA, two class-E power amplifiers, a four-port power combiner and two coil loads. Depending on the phase control of FPGA, the power ratio of outputs at the two coil loads becomes 1:1, 2:0 and 0:2. The manufactured system has delivered 1W DC power to loads at 125 kHz. The total DC-to-DC conversion efficiency shows more than 40 % including PA efficiency of 79 %.

• 한국초전도학회:학술대회논문집
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• v.10
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• pp.2-6
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• 2000

We have developed an extremely sensitive radio frequency amplifier based on the dc superconducting quantum interference device (dc SQUID). Unlike a conventional semiconductor amplifier, a SQUID can be cooled to ultra-low temperatures (100 mK or less) and thus potentially achieve a much lower noise temperature. In a conventional SQUID amplifier, where the integrated input coil is operated as a lumped element, parasitic capacitance between the coil and the SQUID washer limits the frequency up to which a substantial gain can be achieved to a few hundred MHz. This problem can be circumvented by operating the input coil of the SQUID as a microstrip resonator: instead of connecting the input signal open. Such amplifiers have gains of 15 dB or more at frequencies up to 3 GHz. If required, the resonant frequency of the microstrip can be tuned by means of a varactor diode connected across the otherwise open end of the resonator. The noise temperature of microstrip SQUID amplifiers was measured to be between $0.5\;K\;{\pm}\;0.3\;K$ at a frequency of 80 MHz and $1.5\;K\;{\pm}\;1.2\;K$ at 1.7 GHz, when the SQUID was cooled to 4.2 K. An even lower noise temperature can be achieved by cooling the SQUID to about 0.4 K. In this case, a noise temperature of $100\;mK\;{\pm}\;20\;mK$ was achieved at 90 MHz, and of about $120\;{\pm}\;100\;mK$ at 440 MHz.

• Progress in Superconductivity
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• v.2 no.1
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• pp.1-5
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• 2000

We have developed an extremely sensitive radio frequency amplifier based on the dc superconducting quantum interference device (dc SQUID). Unlike a conventional semiconductor amplifier, a SQUID can be cooled to ultra-low temperatures (100 mK or less) and thus potentially achieve a much lower noise temperature. In a conventional SQUID amplifier, where the integrated input coil is operated as a lumped element, parasitic capacitance between the coil and the SQUID washer limits the frequency up to which a substantial gain can be achieved to a few hundred MHz. This problem can be circumvented. by operating the input coil of the SQUID as a microstrip resonator: instead of connecting the input signal between the two ends of the coil, it is connected between the SQUID washer and one end of the coil; the other end is left open. Such amplifiers have gains of 15 dB or more at frequencies up to 3 GHz. If required, the resonant frequency of the microstrip can be tuned by means of a varactor diode connected across the otherwise open end of the resonator. The noise temperature of microstrip SQUID amplifiers was measured to be between 0.5 K $\pm$ 0.3 K at a frequency of 80 MHz and 1.5 K $\pm$: 1.2 K at 1.7 GHz, when the SQUID was cooled to 4.2 K. An even lower noise temperature can be achieved by cooling the SQUID to about 0.4 K. In this case, a noise temperature of 100 mK $\pm$ 20 mK was achieved at 90 MHz, and of about 120 $\pm$ 100 mK at 440 MHz.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.57 no.10
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• pp.1888-1892
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• 2008

In this paper, a new parallel CMOS self-bias differential amplifier is designed to use in high-speed analog signal processing circuits. The designed parallel CMOS self-bias differential amplifier is developed by using internal biasing circuits and the complement gain stages which are parallel connected. And also, the parallel architecture of the designed parallel CMOS self-bias differential amplifier can improve the gain and gain-bandwidth product of the typical CMOS self-bias differential amplifier. With 1.8V $0.8{\mu}m$ CMOS process parameter, the results of HSPICE show that the designed parallel CMOS self-bias differential amplifier has a dc gain and a gain-bandwidth product of 64 dB and 49 MHz respectively.

• Proceedings of the KIEE Conference
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• 1994.07a
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• pp.180-182
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• 1994

In an electron storage ring of Pohang Light Source (PLS), electrons lose their energy in every turn by the synchronous radiation. A high power RF amplifier is employed to compensate the electron energy that is lost by the synchronous radiation. The specification of RF amplifier is an continuous output power of 60 kW at 500.082 MHz operating frequency. The power is supplied to RF cavities in the storage ring tunnel. Total number of amplifier system currently required is three. Tile total number will be increased upto five as the operating condition of storage ring is upgraded. The RF amplifier is mainly consisted of a high voltage DC power supply, an intermediate RF power amplifier (IPA), and a klystron tube. In this article, the design of RF amplifier system and characteristics of the klystron tube will be discussed.

• Journal of electromagnetic engineering and science
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• v.2 no.1
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• pp.5-10
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• 2002

We have analized the inverse class-F and class-F amplifiers using their waveforms. From the analytic equations derived from the analysis, we have calculated tole efficiencies, output powers, DC power dissipations, and optimum fundamental load impedances of the inverse class-F and class-F amplifiers. We also have compared them for various operation conditions, which include the same peak current, saute DC power dissipation, same fundamental RF output power, and same fundamental load impedance with different Ron(on-resistance). These analyses have clearly shown the performance limitations, advantages, and guide to the optimized design of the inverse class-F amplifiers.

• Journal of electromagnetic engineering and science
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• v.15 no.4
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• pp.232-238
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• 2015

This work describes the development of a D-band (110-170 GHz) signal source based on a SiGe BiCMOS technology. This D-band signal source consists of a V-band (50-75 GHz) oscillator, a V-band amplifier, and a D-band frequency doubler. The V-band signal from the oscillator is amplified for power boost, and then the frequency is doubled for D-band signal generation. The V-band oscillator showed an output power of 2.7 dBm at 67.3 GHz. Including a buffer stage, it had a DC power consumption of 145 mW. The peak gain of the V-band amplifier was 10.9 dB, which was achieved at 64.0 GHz and consumed 110 mW of DC power. The active frequency doubler consumed 60 mW for D-band signal generation. The integrated D-band source exhibited a measured output oscillation frequency of 133.2 GHz with an output power of 3.1 dBm and a phase noise of -107.2 dBc/Hz at 10 MHz offset. The chip size is $900{\times}1,890{\mu}m^2$, including RF and DC pads.

• Journal of Navigation and Port Research
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• v.27 no.2
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• pp.217-221
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• 2003

In this work, we used a novel RF-CSP to develop a broadband amplifier MMIC, including all the matching and biasing components, for Ku and K band applications. By utilizing an ACF for the RF-CSP, the fabrication process for the packaged amplifier MMIC could be simplified and made cost effective. STO (SrTiO$_3$) capacitors were employed to integrate the DC biasing components on the MMIC. A pre-matching technique was used for the gate input and drain output of the FETs to achieve a broadband design for the amplifier MMIC. The amplifier CSP MMIC exhibited good RF performance (Gain of 12.5$\pm$1.5 dB, return loss less than -6 dB, PldB of 18.5$\pm$1.5 dBm) over a wide frequency range. This work is the first report of a fully integrated CSP amplifier MMIC successfully operating in the Ku/K band.

• Journal of Navigation and Port Research
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• v.26 no.2
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• pp.215-220
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• 2002

In this paper, the 100 watt unit ower amplifier using temperature independent biasing for DTV (Digital Television) repeater application is designed and fabricated. The DC operation point of this unit power amplifier at temperature variation from $20^{\circ}C$ to $100^{\circ}C$ is fixed by active bias circuit. The variation of current consumption in the 100 watt unit power amplifier has an excellent characteristics of less than 0.6A. The implemented unit power amplifier has the gain over 12dB, the gain flatness of less than 0.5dB and input and output return, loss of than 15dB over the DTV repeater frequency range (470~806MHz). This unit power amplifier yields intermodulation distortion(IMD) of more than 32dBc at 2MHz offset, which satisfies the IMD at output power of 100 watt (50dBm).

• Journal of Advanced Navigation Technology
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• v.23 no.2
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• pp.166-171
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• 2019

This paper has designed a current mode class D power amplifier to increase the transmission efficiency of a 6.78 MHz wireless power transfer (WPT) transmitter and to ensure stable characteristics even when the transmitting and receiving coil intervals change. By reducing the loss due to the parasitic capacitor component of the transistor, which limits the theoretical efficiency of the linear amplifier, this research has improved the efficiency of the power amplifier. The circuit design simulator was used to design the high efficiency amplifier, and the power output and efficiency characteristics according to the load impedance change have been simulated and verified. In the simulation, 42.1 dBm output and 95% efficiency was designed at DC bias 30 V. The power amplifier was fabricated and showed 91% efficiency at the output of 42.1 dBm (16 W). The transmitting and receiving coils were fabricated for wireless power transfer of the drone, and the maximum power added efficiency was 88% and the output power was $42.1dBm{\pm}1.7dB$ according to the load change causing from the coil intervals.