• 제목/요약/키워드: DC-link

검색결과 1,020건 처리시간 0.023초

주기적인 상부 외란이 인가되는 2축 도립 진자의 자세 제어 (The Attitude Control of The Double Inverted Pendulum with Periodic Upper Disturbance)

  • 남노현;이건영
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1998년도 하계학술대회 논문집 G
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    • pp.2309-2311
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    • 1998
  • The attitude control of a double inverted pendulum with a periodical disturbance at link top is dealt in this paper. The proposed system is consisted of the double inverted pendulum and a disturbance link. The lower link is hinged on the plate to free for rotation in the vertical plane. The upper link is connected to the lower link through a DC motor. The DC motor is used to control the posture of the pendulum by adjusting the position of the upper link. The periodical disturbance can be generated by the additional link attached at the end of link 2 through another DC motor, which is the modeling of a posture for a biped supporting with one leg. The motor for the joint simulates the knee joint(or hip joint) and the disturbance for the legs moving in air. The algorithm for controlling a proposed inverted pendulum is consisted of a state feedback control and a fuzzy logic controller. The fuzzy controller keeps the center of gravity of the biped within the specified range through the nonlinear feedback compensator. The state feedback control takes over the role to maintain a desired posture regardless the disturbance at the link top. In these case, the change of the angle and COG of an upper link is compensated with on-line. Simulations with a mathematical model are conducted to show the validity of the proposed controller.

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Analysis on Harmonic Loss of IPMSM for the Variable DC-link Voltage through the FEM-Control Coupled Analysis

  • Park, Hyun Soo;Jeung, Tae Chul;Lee, Jae Kwang;Lee, Byoung Kuk
    • Journal of Electrical Engineering and Technology
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    • 제12권1호
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    • pp.225-229
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    • 2017
  • This paper describes the loss analysis based on load conditions of the air conditioning compressor motors using variable dc-link voltage. The losses of PMSM (Permanent Magnet Synchronous Motor) should be analyzed by the PWM (Pulse Width Modulation) output of inverter. The harmonic loss by the PWM cannot consider that using the current source analysis of the inverter. In addition, when the voltage of dc-link is variable with the condition of variable speed and load conditions in motor, the losses of motor are also changeable, however it is hard to analyze those losses by only electromagnetic finite element method (FEM). Therefore, this paper proposes the analysis method considering the carrier frequency of the inverter and the varying state of the dc-link voltage through the FEM-control coupled analysis. Using proposed analysis method, additional core loss and eddy current loss of permanent magnet caused by PWM could be analyzed. Finally, the validity of the proposed analysis method is verified through the comparison the result of coupled analysis with experiment.

무손실 가변 영전압 구간을 갖는 새로운 저손실 준 병렬공진 직류-링크 인버터 (A New Low Loss Quasi Parallel Resonant DC-Link Inverter with Variable Lossless Zero Voltage Duration)

  • 권경안;김권호;최익;정용채;박민용
    • 전력전자학회논문지
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    • 제2권2호
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    • pp.8-18
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    • 1997
  • 본 논문에서는 개선된 PWM 적용성, 저손실 특성 및 낮은 전압 스트레스를 가지는 새로운 저손실 준 병렬공진 직류-링크 인버터를 제안한다. 직류-링크 동작손실을 대폭 감소시킴은 물론 넓은 동작범위에 걸쳐 안정한 소프트 스위칭을 보장하기 위하여 프리휠링 구간을 최소화시키는 방법을 또한 제안한다. 게다가 직류-링크의 영전압 구간의 무손실 제어에 의하여 낮은 변조지수 동작에 있어서도 제안된 인버터는 개선된 PWM 적용성을 보인다. 제안된 인버더 토폴로지의 유용성을 확인하기 위하여 실험 및 시뮬레이션을 행하였다.

전압 리플 추정을 고려한 단상 PWM 컨버터의 순시치 제어 (Instantaneous Control of a Single-phase PWM Converter Considering the Voltage Ripple Estimate)

  • 김만기;이우철;현동석
    • 전력전자학회논문지
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    • 제2권2호
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    • pp.29-34
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    • 1997
  • 본 논문에서는 단상 PWM 컨버터의 입력전류 제어계와 출력전압 제어계의 안정한 PI 이득을 설계하고 DSP를 이용하여 순시 제어기를 구현한다. DC link 전압 제어기는 연속영역에서 설계하여도 무방하나 입력전류 제어계는 이산화 영향을 무시할 수 없으므로 입력전류 제어계를 연산 시간을 고려하여 이산 영역에서 전달 함수를 구하여 설계한다. 또한 리플전압 추정 루틴을 통하여 실제 커패시터의 정전용량을 알아내는 알고리듬을 제시하고 이 알고리듬에 의하여 DC link 정전 용량을 과도상태에서도 추정해 낼수 있음을 보인다. 실험에 의하여 입력역률 99%와 부하급변시 전압 변동률 $\pm$5% 이하의 결과를 얻었다.

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저감된 DC Link Capacitor 부피를 가지는 역률 개선 Valley-Fill Flyback 컨버터의 설계 및 구현 (Practical Design and Implementation of a Power Factor Correction Valley-Fill Flyback Converter with Reduced DC Link Capacitor Volume)

  • 김세민;강경수;공성재;유혜미;노정욱
    • 전력전자학회논문지
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    • 제22권4호
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    • pp.277-284
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    • 2017
  • For passive power factor correction, the valley fill circuit approach is attractive for low power applications because of low cost, high efficiency, and simple circuit design. However, to vouch for the product quality, two dc-link capacitors in the valley fill circuit should be selected to withstand the peak rectified ac input voltage. The common mode (CM) and differential mode (DM) choke should be used to suppress the electromagnetic interference (EMI) noise, thereby resulting in large size volume product. This paper presents the practical design and implementation of a valley fill flyback converter with reduced dc link capacitors and EMI magnetic volumes. By using the proposed over voltage protection circuit, dc-link capacitors in the valley fill circuit can be selected to withstand half the peak rectified ac input voltage, and the proposed CM/DM choke can be successfully adopted. The proposed circuit effectiveness is shown by simulation and experimentally verified by a 78W prototype.

소용량 직류단 커패시터를 가지는 3-레벨 NPC 인버터의 입-출력 전류 품질 향상을 위한 제어 기법 (A Control Scheme for Quality Improvement of Input-Output Current of Small DC-Link Capacitor Based Three-Level NPC Inverters)

  • 인효철;김석민;박성수;이교범
    • 전력전자학회논문지
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    • 제22권4호
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    • pp.369-372
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    • 2017
  • This paper presents a control scheme for three-level NPC inverters using small DC-link capacitors. To reduce the inverter system volume, the film capacitor with small capacitance is a promising candidate for the DC-link. When small capacitors are applied in a three level inverter, however, the AC ripple component increases in the DC-link NPV (neutral point voltage). In addition, the three-phase input grid currents are distorted when the DC-link capacitors are fed by diode rectifier. In this paper, the additional circuit is applied to compensate for small capacitor systems defect, and the offset voltage injection method is presented for the stabilization in NPV. These two proposed processes evidently ensure the quality improvement of the input grid currents and output load currents. The feasibility of the proposed method is verified by experimental results.

DC-link Capacitor필름 형상에 따른 Joule-heat특성 분석 (Analysis of Joule-heat Characteristics according to the DC-link Capacitor Film Geometrics)

  • 전용원;김영신;전의식
    • 반도체디스플레이기술학회지
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    • 제19권1호
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    • pp.42-48
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    • 2020
  • As global warming accelerates, eco-friendly electric cars are being developed to reduce carbon dioxide emissions, and power conversion inverters are used to drive motors. Among inverter components, DC-link capacitor is heated by high current usage, which causes problems such as performance and life-saving of inverter. Although metal cases with good thermal performance have been used to solve this problem, it is difficult to apply them in practice due to insulation problems with other parts. In this paper, the Heat-Generation influence factor of DC-link capacitor is analyzed. Variables on heat-generation are set at 3 levels for film width, inductance, and film thickness. Box-Behnken to 13 tests using the design and minimal deviations, e.g. through the experiment three times by each level. The surface of the film k type by attaching the sensor current is measured temperature. Capacitance was set to a minimum level of 200 ㎌ and had a frequency of 16 kHz with Worst case, ambient temperature of 85℃ and a ripple current of 50 Ams was applied. The temperature at the measurement point was collected in the data logger after sampling at 1 minute intervals for 2 hours after saturation with the ambient temperature. This experiment confirmed that setup factors are correlated with heat-generation.

Estimation of ESR in the DC-Link Capacitors of AC Motor Drive Systems with a Front-End Diode Rectifier

  • Nguyen, Thanh Hai;Le, Quoc Anh;Lee, Dong-Choon
    • Journal of Power Electronics
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    • 제15권2호
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    • pp.411-418
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    • 2015
  • In this paper, a new method for the online estimation of equivalent series resistances (ESR) of the DC-link capacitors in induction machine (IM) drive systems with a front-end diode rectifier is proposed, where the ESR estimation is conducted during the regenerative operating mode of the induction machine. In the first place, a regulated AC current component is injected into the q-axis current component of the induction machine, which induces the current and voltage ripple components in the DC-link. By processing these AC signals through digital filters, the ESR can be estimated by a recursive least squares (RLS) algorithm. To acquire the AC voltage across the ESR, the DC-link voltage needs to be measured at a double sampling frequency. In addition, the ESR current is simply reconstructed from the stator currents and switching states of the inverter. Experimental results have shown that the estimation error of the ESR is about 1.2%, which is quite acceptable for condition monitoring of the capacitor.

Two Modified Z-Source Inverter Topologies - Solutions to Start-Up Dc-Link Voltage Overshoot and Source Current Ripple

  • Bharatkumar, Dave Heema;Singh, Dheerendra;Bansal, Hari Om
    • Journal of Power Electronics
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    • 제19권6호
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    • pp.1351-1365
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    • 2019
  • This paper proposes two modified Z-source inverter topologies, namely an embedded L-Z-source inverter (EL-ZSI) and a coupled inductor L-Z source inverter (CL-ZSI). The proposed topologies offer a high voltage gain with a reduced passive component count and reduction in source current ripple when compared to conventional ZSI topologies. Additionally, they prevent overshoot in the dc-link voltage by suppressing heavy inrush currents. This feature reduces the transition time to reach the peak value of the dc-link voltage, and reduces the risk of component failure and overrating due to the inrush current. EL-ZSI and CL-ZSI possess all of the inherent advantages of the conventional L-ZSI topology while eliminating its drawbacks. To verify the effectiveness of the proposed topologies, MATLAB/Simulink models and scaled down laboratory prototypes were constructed. Experiments were performed at a low shoot through duty ratio of 0.1 and a modulation index as high as 0.9 to obtain a peak dc-link voltage of 53 V. This paper demonstrates the superiority of the proposed topologies over conventional ZSI topologies through a detailed comparative analysis. Moreover, experimental results verify that the proposed topologies would be advantageous for renewable energy source applications since they provide voltage gain enhancement, inrush current, dc-link voltage overshoot suppression and a reduction of the peak to peak source current ripple.

병렬 삼상 부스트 컨버터에서 2개의 DC-link 전류 센서를 이용한 전류 재구성 방법 (Current Reconstruction method Using Two DC-Link Current Sensors in Parallel Three-Phase Boost Converter)

  • 김민섭;임창순;현동석
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2013년도 추계학술대회 논문집
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    • pp.54-55
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    • 2013
  • 본 논문은 병렬 삼상 부스트 컨버터에서 2개의 DC-link 전류 센서를 이용한 새로운 방법을 제안 하였다. 단 2개의 전류 센서만 이용하였고, 순환 전류 문제를 해결하면서 전류를 재구성을 하였다. 이러한 병렬 삼상 부스트 컨버터는 저가 및 중, 대형 전력 시스템에 많이 사용될 것이다. 제안한 방법을 적용하고 그 타당성을 시뮬레이션으로 검증 하였다.

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