• The Transactions of the Korean Institute of Power Electronics
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• v.10 no.4
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• pp.373-379
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• 2005

In this paper, the control algorithm of DC source device for inverter starting is proposed and the control method for compensating unbalance system source on operating time in the voltage type PWM converter with driving and regenerative faculty is suggested. The maintaining way of balancing condition for converter of AC source is used the compensating unbalanced status by current control loop. Because it is possible that the unbalanced System control is used to leakage transformer not equaled reactance by each phase in rectifier system, the proposed H/W and control algorithm of rectifier system is contributed to minimize of device and rising efficiency.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.48 no.7
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• pp.369-375
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• 1999

This paper presents the novel low-performance single-phase voltage regulator which has common arm between the AC/DC and DC/AC power converters and adopts appropriate switching strategy, resulting in the reduction of the number of switching devices. Moreover, by introducing the method to replace the method to replace the conventional AC condenser in filter circuit with the new low-cost type using two DC condenser, the whole voltage regulator system can be more compact, simpler and less expensive than conventional ones. The fully digital controller is designed using high speed DSP, and the proposed system is validated through the experimental results.

• Proceedings of the KIPE Conference
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• 2009.11a
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• pp.219-221
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• 2009

태양전지 어레이(PV-array)로부터 발전되는 DC 전력을 AC로 변환시켜 계통으로 발전시키는 역할을 하는 태양광 발전 시스템용 PCS의 스위칭 회로 Topology로는 일반적으로 3상 풀브리지 회로가 사용된다. 이러한 3상 풀브리지 회로 시스템의 수명예측을 위해 DC link 단의 커패시터의 커패시턴스를 계산하여 커패시턴스의 감소정도를 이용하여 전체 시스템의 수명을 예측하게 된다. 이러한 커패시터의 상태를 추정하기 위해서는 시스템을 정지시킨 후 커패시터를 분리하여 커패시턴스를 측정하는 방법, 특정 주파수의 전류(일반적으로 저주파)를 주입하고 주입한 전류의 주파수에 해당하는 전류 및 전압을 검출하여 capacitance 연산하는 방식등이 이용된다. 시스템을 정지시킨 후 커패시터를 분리하여 커패시턴스를 측정하는 방법은 번거로우며, 전류 주입을 이용한 방식은 불필요한 고조파 전류가 계통으로 침투하는 단점을 가진다. 그러므로 본 연구에서는 모듈타입 PCS 이용시 계통으로 고조파 침투가 없는 비침투 커패시턴스 계산 알고리즘을 제안한다.

• The Transactions of the Korean Institute of Power Electronics
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• v.18 no.2
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• pp.184-191
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• 2013

In this paper, bidirectional AC-DC converter using dual half-bridge converter is proposed. A transformer leakage inductance in the dual half-bridge converter is used for making resonance with the capacitor of the voltage-doubler, which can help the switched current to be sinusoidal without extra inductive component and also the switching loss can be reduced through operation such as ZVS, ZCS. Both circuit analysis and design guideline are described, and also the feasibility for the proposed converter is shown through the hardware implementation and the experimental results.

• Proceedings of the KIPE Conference
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• 2006.06a
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• pp.438-440
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• 2006

포항가속기 연구소의 선형가속기와 빔 전송선에는 22개의 솔레노이드 전자석, 38개의 사극전자석 그리고 전자빔의 궤도 조절을 위한 29개의 2극 전자석이 있다. 전자빔의 정밀 제어를 위한 전자적 전원장치는 고정도, 고안정도 출력 특성을 가져야 한다. 이를 위하여 풀-브릿지 4-상한 DC-DC 컨버터 토플로지의 4단 병렬운전을 채택하였다. 전원장치의 입력전압은 직류 40V이고, 최대 출력전류는 직류 50A이며 그리고 스윗칭 주파수는 50 kHz이다. 고정밀, 고안정도 출력전류를 얻기 위하여 입력단의 전원 노이즈 및 전력변환부의 스윗칭 노이즈를 제거하여야 한다. 이를 위하여 채택된 low-pass 필터의 cut-off 주파수는 입력과 출력단 각각 26 Hz와 4.5 kHz 이다. 출력전류에서 전원장치로부처 발생하는 주파수 성분을 완벽하게 제거하였다. 출력전류의 분해능은 1mA 이하이며, 안정도는 10시간 이상 장시간의 경우 +/-15 ppm 이하이고 1시간 이하 단시간의 경우 +/-10ppm 이하이다. 본 논문에서는 풀-브릿지 4-상한 DC-DC 컨버터 토플로지의 4단 병렬운전을 채택한 전자석 전원장치의 구성, 특성 그리고 실험결과에 대하여 기술하였다.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.49 no.12
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• pp.813-820
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• 2000

A technique to suppress the low frequency ripple voltage of the DC output in three phase buck diode converter is presented in this paper. The proposed pulse frequency modulation methods and duty ratio modulation methods are employed to regulate the output voltage of the buck diode converter and guarantee zero-current-switching(ZCS) of the switch over the wide load range. The proposed control methods used in this paper provide generally good performance such as low THD of the input line current and unity power factor. In addition, control methods can be effectively used to suppress the low frequency ripple voltage appeared in the dc output voltage. The harmonic injection technique illustrates its validity and effectiveness through the simulations and experiments.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.26 no.4
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• pp.57-66
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• 2012

When typical Z-source DC/AC inverter(ZSI) is operated in high voltage gain area, because of its high duty ratio, voltage and current stress in Z-network of typical ZSI are increased. This paper proposes a new switched trans ZSI(STZSI) with two switched trans cells which consist of one trans and two diodes. To confirm the operation performance of the proposed system, the PSIM simulation is performed for typical ZSI, switched inductor ZSI and the proposed STZSI. Voltage / current stress and transient state characteristics of each method are compared under the condition of DC input voltage 100[V] and output phase voltage 66[Vrms]. As a result, we confirmed that transient state of the proposed STZSI is short compared with the conventional ZSI because the high voltage gain is obtained using the same duty ratio, also a low duty ratio is required for the same output voltage. Finally, we could know the proposed system have low voltage and current stress in Z-network compared with the conventional ZSI.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.49 no.3
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• pp.165-171
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• 2000

This paper proposes a technique to design of air-core type Linear DC Motor(LDM) by using Equivalent Magnetizing Current(EMC) method and has performed its dynamic analysis. The magnetic flux density differ in accordance with airgap position due to difference of mechanical and magnetic air gap length and the coil shape has an influence on the thrust. Therefore, the analysis of magnetic field due to the magnets is carried out by EMC. The phenomena according to the various coil various coil shape under the same Magneto Motive Force(MMF) has been analyzed and its result is applied to the design process. The appropriateness of the proposed technique is confirmed by Finite Element Method(FEM) and its dynamic analysis is carried out from the coupling of the electrical circuit equation and mechanical kinetic equation.

• Journal of Sensor Science and Technology
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• v.13 no.1
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• pp.35-40
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• 2004

A thin-film multijunction thermal converter was fabricated through the process using 6 inch silicon wafer semiconductor process and bulk micromachining. Evanohm R alloy and chromel-constantan were used as a heater and thermocouple materials, respectively. The temperature coefficient of resistance of Evanohm R heater was about 75.12 ppm/$^{\circ}C$ and the voltage sensitivity of the thermal converter indicated about 5.75 mV/mW in air. The transfer differences, measured by FRDC-DC method in the frequency range from 20 Hz to 10 kHz, showed the value under about 1.36 ppm, 0.83 ppm for the film thickness of 500, 200 nm, respectively. And in case of a 200 nm-thick thermal converter, the AC-DC transfer differences seems to be stabilized below the value of 1 ppm in the frequency range from 1 kHz to 500 kHz.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.35C no.6
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• pp.39-47
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• 1998

A fourth-order $\Sigma$-$\Delta$ modulator is designed and implemented in 0.6 $\mu\textrm{m}$ CMOS technology. The modulator is verified by introducing nonlinear factors such as DC gain and slew rate in system model that determines the transfer function in S-domain and in time-domain. Dynamic range is more than 110 dB and the peak SM is 102.6 dB at a clock rate of 2.8224 MHz for voiceband signal. The structure of a ∑-$\Delta$ modulator is a modified fourth-order ∑-$\Delta$ modulator using direct feedback loop method, which improves performance and consumes less power. The transmission zero for noise is located in the first-second integrator loop, which reduces entire size of capacitors, reduces the active area of the chip, improves the performance, and reduces power dissipation. The system is stable because the output variation with respect to unit time is small compared with that of the third integrator. It is easy to implement because the size of the capacitor in the first integrator, and the size of the third integrator is small because we use the noise reduction technique. This paper represents a new design method by modeling that conceptually decides transfer function in S-domain and in Z-domain, determines the cutoff frequency of signal, maximizes signal power in each integrator, and decides optimal transmission-zero frequency for noise. The active area of the prototype chip is 5.25$\textrm{mm}^2$, and it dissipates 10 mW of power from a 5V supply.