• Journal of Electrical Engineering and Technology
• /
• v.9 no.6
• /
• pp.1944-1953
• /
• 2014

This paper shows the design and control methods of the bidirectional DC-DC converter to generate the proper DC-link voltage of a PMSM drive. Conventionally, because the controllable power of the PWM based voltage source inverter is limited by its DC-link voltage, the DC-DC converter is used for boosted DC-link voltage if the inverter source cannot generate enough operating voltage for the PMSM drive. In this paper, to obtain more utilization of this DC-DC converter, optimal DC-link voltage control for PMSM drive will be explained. First, the process and current path of the DC-DC converter will be illustrated, and a control method of this converter for variable DC-link voltage will then be explained. Finally, an improvement analysis of the optimal DC-link voltage control method, especially on the deadtime effect, will be explained. The DC-DC converter of the proposed control method is verified by the experiments by comparing with the conventional constant voltage control method.

• The Transactions of the Korean Institute of Power Electronics
• /
• v.2 no.2
• /
• pp.8-18
• /
• 1997

In this paper, a New Low Loss Quasi-Parallel Resonant DC-Link(NLQPRDCL) Inverter which shows highly improved PWM capability, low loss characteristic and low voltage stress is presented. A method to minimize freewheeling interval, which is able to largely decrease DC-link operation losses and to steadily guarantee soft switching in the wide operation region is also proposed. In addition, lossless control of zero voltage duration of DC-link makes the proposed inverter maintain the advanced PWM capability even under a very low modulation index. Experiment and simulation were performed to verify validity of the proposed inverter topology.

• Journal of Power Electronics
• /
• v.19 no.6
• /
• pp.1351-1365
• /
• 2019

This paper proposes two modified Z-source inverter topologies, namely an embedded L-Z-source inverter (EL-ZSI) and a coupled inductor L-Z source inverter (CL-ZSI). The proposed topologies offer a high voltage gain with a reduced passive component count and reduction in source current ripple when compared to conventional ZSI topologies. Additionally, they prevent overshoot in the dc-link voltage by suppressing heavy inrush currents. This feature reduces the transition time to reach the peak value of the dc-link voltage, and reduces the risk of component failure and overrating due to the inrush current. EL-ZSI and CL-ZSI possess all of the inherent advantages of the conventional L-ZSI topology while eliminating its drawbacks. To verify the effectiveness of the proposed topologies, MATLAB/Simulink models and scaled down laboratory prototypes were constructed. Experiments were performed at a low shoot through duty ratio of 0.1 and a modulation index as high as 0.9 to obtain a peak dc-link voltage of 53 V. This paper demonstrates the superiority of the proposed topologies over conventional ZSI topologies through a detailed comparative analysis. Moreover, experimental results verify that the proposed topologies would be advantageous for renewable energy source applications since they provide voltage gain enhancement, inrush current, dc-link voltage overshoot suppression and a reduction of the peak to peak source current ripple.

• Proceedings of the KIPE Conference
• /
• 1998.10a
• /
• pp.159-164
• /
• 1998

This paper proposes a SVPWM (space vector pulse width modulation) strategy for a multi-level voltage source inverter. This strategy is easily implemented as SPWM (sinusoidal pulse width modulation) and has the same DC-link voltage utilization as general SVPWM. The method to keep the voltage balancing of DC-link also is proposed by the analysis model of DC-link voltage fluctuation. The usefulness of the proposed SVPWM is verified through the simulation.

• The Transactions of the Korean Institute of Power Electronics
• /
• v.22 no.3
• /
• pp.256-262
• /
• 2017

This paper presents the control algorithm of a single-phase AC/DC/AC PWM converter for the linear compressor of a refrigerator. The AC/DC/AC converter consists of a full-bridge PWM converter for the control of the input power factor and a half-bridge PWM inverter for the control of the single-phase linear compressor. At the DC-link of this topology, two capacitors are connected in series. These DC-link voltages must be balanced for safe operation. Thus, a new control method of DC voltage balancing for the half-bridge PWM inverter is proposed. The balancing algorithm uses the Integral-Proportional controller and inserts the DC-offset current at the Proportional-Resonant current controller of the inverter to solve the DC-link unbalanced voltages between the two capacitors. The proposed algorithm can be easily implemented without much computation and additional hardware circuit. The usefulness of the proposed algorithm is verified through several experiments.

• Journal of Power Electronics
• /
• v.11 no.4
• /
• pp.561-567
• /
• 2011

This paper presents a high-efficiency power conditioning system (PCS) for grid-connected photovoltaic (PV) modules. The proposed PCS consists of a step-up DC-DC converter and a single-phase DC-AC inverter for the grid-connected PV modules. A soft-switching step-up DC-DC converter is proposed to generate a high DC-link voltage from the low PV module voltage with a high-efficiency. A DC-link voltage controller is presented for constant DC-link voltage regulation. A half-bridge inverter is used for the single-phase DC-AC inverter for grid connection. A grid current controller is suggested to supply PV electrical power to the power grid with a unity power factor. Experimental results are obtained from a 180 W grid-connected PV module system using the proposed PCS. The proposed PCS achieves a high power efficiency of 93.0 % with an unity power factor for a 60 Hz / 120 Vrms AC power grid.

• Journal of Power Electronics
• /
• v.18 no.1
• /
• pp.116-128
• /
• 2018

Conventionally, in order to reduce the ac components of the dc-link capacitors of the two-level Half-Bridge Voltage Source Inverter (HB-VSI), high dc-link capacitances are required. This necessitates the employment of short-lifetime and bulky electrolytic capacitors. In this paper, an analysis for the performance of low dc-link capacitances-based HB-VSI is presented to elucidate its ability to generate an enhanced fundamental output voltage magnitude without increasing the voltage rating of the involved switches. This feature is constrained by the load displacement factor. The introduced enhancement is due to the ac components of the capacitors' voltages. The presented approach can be employed for multi-phase systems through using multi single-phase HB-VSI(s). Mathematical analysis of the proposed approach is presented in this paper. To ensure a successful operation of the proposed approach, a closed loop current controller is examined. An expression for the critical dc-link capacitance, which is the lowest dc-link capacitance that can be employed for unipolar capacitors' voltages, is derived. Finally, simulation and experimental results are presented to validate the proposed claims.

• Proceedings of the KIEE Conference
• /
• 1996.11a
• /
• pp.350-352
• /
• 1996

A Hight Efficiency Quasi-Parallel Resonant DC-Link Inverter which shows highly improved PWM capability, low loss characteristic and low voltage stress is presented. A method to minimize freewheeling interval, which is able to largely decrease DC-link operation losses and to steadily guarantee soft switching in the wide operation region is proposed. Analysis and simple experiments were performed to verify validity of the proposed inverter topology.

• Journal of IKEEE
• /
• v.23 no.1
• /
• pp.99-106
• /
• 2019

This paper propose a new form of UPQC (Unified Power Quality Compensator) to compensate the current and voltage quality problems of nonlinear loads. The conventional UPQC system consists of a series inverter, a parallel inverter, and a common DC link. A new type of UPQC proposed is a parallel compensator with SVC (Static Var Compensator) added to compensate for the wide compensation range and low DC link voltage. The parallel inverter compensates the reactive power generated by the nonlinear load, and the series inverter compensates the sag and swell generated at the power supply side.

• The Transactions of the Korean Institute of Electrical Engineers P
• /
• v.58 no.4
• /
• pp.391-396
• /
• 2009

In this paper, a control algorithm for DC-Link voltage unbalancing compensation of a four-switch inverter for a three-phase BLDC motor drive is proposed. Compared with a conventional six-switch inverter, the split source of the four-switch inverter can be obtained by splitting DC-link capacitor into two capacitors to drive the three phase BLDC motor. The voltages across each of two capacitors are not always equal in steady state because of the unbalance in the impedance of the DC-link capacitors $C_1$ and $C_2$ or the variable current flowed into the capacitor's neutral point in motor control. Despite the unbalance, if the BLDC motor may be run for a long time the voltage across one of the capacitors is more increased. So the unbalance in the capacitors voltages will be accelerated. As a result, The current ripple and torque ripple is increased due to the fluctuation of input current which flows into 3-phase BLDC motor. According to that, the vibration of motor will be increased and the whole system will be instable. This paper presents a control algorithm for DC-Link voltage unbalancing compensation. The sampling from the voltages across each of two capacitors is used to perform the voltage control of DC-Link by using the feedforward controller.