• Title/Summary/Keyword: DC leakage current

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Degradation of the SiGe hetero-junction bipolar transistor in SiGe BiCMOS process (실리콘-게르마늄 바이시모스 공정에서의 실리콘-게르마늄 이종접합 바이폴라 트랜지스터 열화 현상)

  • Kim Sang-Hoon;Lee Seung-Yun;Park Chan-Woo;Kang Jin-Young
    • Journal of the Korean Vacuum Society
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    • v.14 no.1
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    • pp.29-34
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    • 2005
  • The degradation of the SiGe hetero-junction bipolar transistor(HBT) properties in SiGe BiCMOS process was investigated in this paper. The SiGe HBT prepaired by SiGe BiCMOS process, unlike the conventional one, showed the degraded DC characteristics such as the decreased Early voltage, the decreased collector-emitter breakdown voltage, and the highly increased base leakage current. Also, the cutoff frequency(f/sub T/) and the maximum oscillation frequency(f/sub max/) representing the AC characteristics are reduced to below 50%. These deteriorations are originated from the change of the locations of emitter-base and collector-base junctions, which is induced by the variation of the doping profile of boron in the SiGe base due to the high-temperature source-drain annealing. In the result, the junctions pushed out of SiGe region caused the parastic barrier formation and the current gain decrease on the SiGe HBT device.

Effect of Low-Temperature Sintering on Electrical Properties and Aging Behavior of ZVMNBCD Varistor Ceramics

  • Nahm, Choon-Woo
    • Korean Journal of Materials Research
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    • v.30 no.10
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    • pp.502-508
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    • 2020
  • This paper focuses on the electrical properties and stability against DC accelerated aging stress of ZnO-V2O5-MnO2-Nb2O5-Bi2O3-Co3O4-Dy2O3 (ZVMNBCD) varistor ceramics sintered at 850 - 925 ℃. With the increase of sintering temperature, the average grain size increases from 4.4 to 11.8 mm, and the density of the sintered pellets decreases from 5.53 to 5.40 g/㎤ due to the volatility of V2O5, which has a low melting point. The breakdown field abruptly decreases from 8016 to 1,715 V/cm with the increase of the sintering temperature. The maximum non-ohmic coefficient (59) is obtained when the sample is sintered at 875 ℃. The samples sintered at below 900 ℃ exhibit a relatively low leakage current, less than 60 mA/㎠. The apparent dielectric constant increases due to the increase of the average grain size with the increase of the sintering temperature. The change tendency of dissipation factor at 1 kHz according to the sintering temperature coincides with the tendency of the leakage current. In terms of stability, the samples sintered at 900 ℃ exhibit both high non-ohmic coefficient (45) and excellent stability, 0.8% in 𝚫EB/EB and -0.7 % in 𝚫α/α after application of DC accelerated aging stress (0.85 EB/85 ℃/24 h).

A Study on SOI-like-bulk CMOS Structure Operating in Low Voltage with Stability (저전압동작에 적절한 SOI-like-bulk CMOS 구조에 관한 연구)

  • Son, Sang-Hee;Jin, Tae
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.11 no.6
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    • pp.428-435
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    • 1998
  • SOI-like-bulk CMOS device is proposed, which having the advantages of SOI(Silicon On Insulator) and protects short channel effects efficiently with adding partial epitaxial process at standard CMOS process. SOI-like-bulk NMOS and PMOS with 0.25${\mu}{\textrm}{m}$ gate length have designed and optimized through analyzing the characteristics of these devices and applying again to the design of processes. The threshold voltages of the designed NMOS and PMOS are 0.3[V], -0.35[V] respectively and those have shown the stable characteristics under 1.5[V] gate and drain voltages. The leakage current of typical bulk-CMOS increase with shortening the channel length, but the proposed structures on this a study reduce the leakage current and improve the subthreshold characteristics at the same time. In addition, subthreshold swing value, S is 70.91[mV/decade] in SOI-like-bulk NMOS and 63.37[mV/ decade] SOI-like-bulk PMOS. And the characteristics of SOI-like-bulk CMOS are better than those of standard bulk CMOS. To validate the circuit application, CMOS inverter circuit has designed and transient & DC transfer characteristics are analyzed with mixed mode simulation.

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Twin Target Sputtering System with Ladder Type Magnet Array for Direct Al Cathode Sputtering on Organic Light Emitting Diodes

  • Moon, Jong-Min;Kim, Han-Ki
    • Journal of Information Display
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    • v.8 no.3
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    • pp.5-10
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    • 2007
  • Twin target sputtering (TTS) system with a configuration of vertically parallel facing Al targets and a substrate holder perpendicular to the Al target plane has been designed to realize a direct Al cathode sputtering on organic light emitting diodes (OLEDs). The TTS system has a linear twin target gun with ladder type magnet array for effective and uniform confinement of high density plasma. It is shown that OLEDs with Al cathode deposited by the TTS show a relatvely lower leakage current density $({\sim}1{\times}10^{-5}mA/cm^2)$ at reverse bias of -6V, compared to that ($1{\times}10^{-2}{\sim}10^{-3}$ $mA/cm^2$ at -6V) of OLEDs with Al cathodes grown by conventional DC magnetron sputtering. In addition, it was found that Al cathode films prepared by TTS were amorphous structure with nanocrystallines due to low substrate temperature. This demonstrates that there is no plasma damage caused by the bombardment of energetic particles. This indicates that the TTS system with ladder type magnet array could be useful plasma damage free deposition technique for direct Al cathode sputtering on OLEDs or flexible OLEDs.

CMOS Inverter Design based on Double Gate Ultra-Thin Body MOSFETs

  • Park, Sang Chun;Ahn, Yongsoo
    • Proceeding of EDISON Challenge
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    • 2015.03a
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    • pp.343-346
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    • 2015
  • Ultra-thin body transistor is one of the emerging devices since it control leakage current flows through substrate. In addition, it can be operated by double gates, thus, its on/off current ratio is higher than conventional counterpart. In this paper, we design and investigate a CMOS inverter based on ultra-thin body MOSFETs to estimate its performance in real application. NEGF (non-equilibrium Green's function) method is used to obatain relationship between drain current and voltage. DC transfer is extracted from the relationship, and FO4 (fanout-of-4) propagation delay is reported as 5.1 ps estimated by a simple model.

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Local Current Distribution in a Ferromagnetic Tunnel Junction Fabricated Using Microwave Excited Plasma Method (마이크로파 여기 프라즈마법으로 제조한 강자성 터널링 접합의 국소전도특성)

  • Yoon, Tae-Sick;Kim, Cheol-Gi;Kim, Chong-Oh;Masakiyo Tsunoda;Migaku Takahashi;Ying Li
    • Journal of the Korean Magnetics Society
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    • v.13 no.2
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    • pp.47-52
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    • 2003
  • Ferromagnetic tunnel junctions were fabricated by dc magnetron sputtering and plasma oxidation process. The local transport properties of the ferromagnetic tunnel junctions were studied using contact-mode Atomic Force Microscopy (AFM) and the local current-voltage analysis. Tunnel junctions with the structure of sub./Ta/Cu/Ta/NiFe/Cu/Mn$\_$75/Ir$\_$25//Co$\_$70/Fe$\_$30//Al-oxide were prepared on thermally oxidized Si wafers. Al-oxide layers were formed with microwave excited plasma using radial line slot antenna (RLSA) for 5 and 7 sec. Kr gas was used as the inert gas mixed with $O_2$ gas for the plasma oxidization. No correlation between topography and current image was observed while they were measured simultaneously. The local current distribution was well identified with the distribution of local barrier height. Assuming the gaussian distribution of the local barrier height, the ferromagnetic tunnel junction with longer oxidation time was well fitted with the experimental results. As contrast, in the case of the shorter time oxidation junction, the current mainly flow through the low barrier height area for its insufficient oxygen. Such leakage current might result in the decrease of tunnel magnetoresistance (TMR) ratio.

Zero-Voltage-Transition Buck Converter for High Step-Down DC-DC Conversion with Low EMI

  • Ariyan, Ali;Yazdani, Mohammad Rouhollah
    • Journal of Power Electronics
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    • v.17 no.6
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    • pp.1445-1453
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    • 2017
  • In this study, a new zero-voltage transition (ZVT) buck converter with coupled inductor using a synchronous rectifier and a lossless clamp circuit is proposed. The regular buck converter with tapped inductor has extended duty cycle for high step-down applications. However, the leakage inductance of the coupled inductor produced considerable voltage spikes across the switch. A lossless clamp circuit is used in the proposed converter to overcome this problem. The freewheeling diode was replaced with a synchronous rectifier to reduce conduction losses in the proposed converter. ZVT conditions at turn-on and turn-off instants were provided for the main switch. The synchronous rectifier switch turned on under zero-voltage switching, and the auxiliary switch turn-on and turn-off were under zero-current condition. Experimental results of a 100 W-100 kHz prototype are provided to justify the validity of the theoretical analysis. Moreover, the conducted electromagnetic interference of the proposed converter is measured and compared with its hard-switching counterpart.

Analysis and Implementation of LC Series Resonant Converter with Secondary Side Clamp Diodes under DCM Operation for High Step-Up Applications

  • Jia, Pengyu;Yuan, Yiqin
    • Journal of Power Electronics
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    • v.19 no.2
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    • pp.363-379
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    • 2019
  • Resonant converters have attracted a lot of attention because of their high efficiency due to the soft-switching performance. An isolated high step-up converter with secondary-side resonant loops is proposed and analyzed in this paper. By placing the resonant loops on the secondary side, the current stress for the resonant capacitors is greatly reduced. The power loss caused by the equivalent series resistance of the resonant capacitor is also decreased. Clamp diodes in parallel with the resonant capacitors ensure a unique discontinuous current mode in the converter. Under this mode, the active switches can realize soft-switching during both turn-on and turn-off transitions. Meanwhile, the reverse-recovery problems of diodes are also alleviated by the leakage inductor. The converter is essentially a step-up converter. Therefore, it is helpful for decreasing the transformer turn-ratio when it is applied as a high step-up converter. The steady-state operation principle is analyzed in detail and design considerations are presented in this paper. Theoretical conclusions are verified by experimental results obtained from a 500W prototype with a 35V-42V input and a 400V output.

Development of DC Arc Generator to protect against Malfunctions and Fires caused by Arcing (아크 발생에 따른 고장 및 화재를 보호하기 위한 직류 아크 Generator 개발)

  • Yoon, Yongho
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.21 no.6
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    • pp.123-128
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    • 2021
  • As the spread of DC power distribution systems increases, the occurrence of failures and fire accidents are also increasing. In particular, the ESS fire accident, which is a component of the smart grid, and the fire accident of the solar power system, which is a direct current system, are caused by problems in the electrical connection between system components as the supply of new and renewable energy rapidly increases and old facilities increase. An arc that can cause a direct fire by releasing the induced light and heat has been pointed out as one of the causes of fire. Therefore, the problem of such an arc defect is that it is impossible to block an arc accident in advance with the existing overcurrent circuit breaker and earth leakage circuit breaker. In this paper, we intend to develop a test equipment that satisfies international standardization and to develop a DC arc generator to protect against failure and fire caused by arcing.

A New 12-Pulse Diode Rectifier System With Low kVA Components For Clean Power Utility Interface

  • ;Prasad N.Enjeti
    • The Transactions of the Korean Institute of Power Electronics
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    • v.4 no.5
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    • pp.423-432
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    • 1999
  • This paper proposes a 12­pulse diode rectifier system with low kVA components suitable for powering switch mode power supplies or ac/dc converter applications. The proposed 12-pulse system employs a polyphase transformer, a zero sequence blocking transformer (ZSBT) in the dc link, and an interphase transformer. Results produce near equal leakage inductance in series with each diode rectifier bridge ensuring equal current sharing and performance improvements, The utility input currents and the voltage across the ZSBT are analyzed the kVA rating of each component in the proposed system is computed. The 5th , 7th , 17th and 19th harmonics are eliminated in the input line currents resulting in clean input power. The dc link voltage magnitude generated by the proposed rectifier system is nearly identical to a conventional to a conventional 6-pulse system. The proposed system is suitable to retrofit applications as well as in new PWM drive systems. Simulation and experimental results from a 208V , 10kVA system are shown.

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