• New & Renewable Energy
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• v.3 no.2 s.10
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• pp.60-67
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• 2007

This paper describes the design and integration of the wind-fuel cell hybrid system. The hybrid system components included a wind turbine, an electrolyzer (for generation of H2), a PEMFC (Proton Exchange Membrane Fuel Cell), hydrogen storage tank and BOP (Balance of Plant) system. The energy input is entirely provided by a wind turbine. A DC-DC converter controls the power input to the electrolyzer, which produces hydrogen and oxygen form water. The hydrogen used the fuel for the PEMFC. Hydrogen may be produced and stored in high pressure tank by hydrogen gas booster system. Wind conditions are changing with time of day, season and year. So, wind power is a variable energy source. The main purpose with these WT-FC hybrid system is to store hydrogen by electrolysis of water when wind conditions are good and release the stored hydrog en to supply the fuelcell when wind is low.

• Journal of Power Electronics
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• v.15 no.4
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• pp.1131-1138
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• 2015

This study presents an input-powered high-efficiency interface circuit for energy harvesting systems, and introduces a zero standby power design to reduce power consumption significantly while removing the external power supply. This interface circuit is composed of two stages. The first stage voltage doubler uses a positive feedback control loop to improve considerably the conversion speed and efficiency, and boost the output voltage. The second stage active diode adopts a common-grid operational amplifier (op-amp) to remove the influence of offset voltage in the traditional comparator, which eliminates leakage current and broadens bandwidth with low power consumption. The system supplies itself with the harvested energy, which enables it to enter the zero standby mode near the zero crossing points of the input current. Thereafter, high system efficiency and stability are achieved, which saves power consumption. The validity and feasibility of this design is verified by the simulation results based on the 65 nm CMOS process. The minimum input voltage is down to 0.3 V, the maximum voltage efficiency is 99.6% with a DC output current of 75.6 μA, the maximum power efficiency is 98.2% with a DC output current of 40.4 μA, and the maximum output power is 60.48 μW. The power loss of the entire interface circuit is only 18.65 μW, among which, the op-amp consumes only 2.65 μW.

• Proceedings of the KIPE Conference
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• 2012.07a
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• pp.201-202
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• 2012

This paper presents a simple and cost-effective stand-alone rapid battery charging system of 30kW for electric vehicles. The proposed system mainly consists of active front-end rectifier of neutral point clamped 3-level type and non-isolated bi-directional dc-dc converter of multi-phase interleaved half-bridge topology. The charging system is designed to operate for both lithium-polymer and lithium-ion batteries. The complete charging sequence is made up of three sub-interval operating modes; pre-charging mode, constant-current mode, and constant-voltage mode. Each mode is operated according to battery states: voltage, current and State of Charging (SOC). The proposed system is able to reach the full-charge state within less than 16min for the battery capacity of 8kWh by supplying the charging current of 67A. The optimal discharging algorithm for Vehicle to the Grid (V2G) operation has been adopted to maintain the discharging current of 1C. Owing to the simple and compact power conversion scheme, the proposed solution has superior module-friendly mechanical structure which is absolutely required to realize flexible power expansion capability in a very high-current rapid charging system. Experiment waveforms confirm the proposed functionality of the charging system.

• The Transactions of the Korean Institute of Power Electronics
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• v.16 no.1
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• pp.11-19
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• 2011

This paper describe development of a hardware simulator for the DFIG wind power system, which was designed considering wind characteristic, blade characteristic, and blade inertia compensation. The simulator consists of three major parts, such as wind turbine model using induction motor, doubly-fed induction generator, converter-inverter set. and control system. The turbine simulator generates torque and speed signals for a specific wind turbine with respect to the given wind speed which is detected by Anemometer. This torque and speed signals are scaled down to fit the input of 3.5kW DFIG. The MSC operates to track the maximum power point, and the GSC controls the active and reactive power supplied to the grid. The operational feasibility was verified through computer simulations with PSCAD/EMTDC. And the implementation feasibility was confirmed through experimental works with a hardware set-up.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.15 no.6
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• pp.2168-2187
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• 2021

The smart grid replaces the traditional power structure with information inventiveness that contributes to a new physical structure. In such a field, malicious information injection can potentially lead to extreme results. Incorrect, FDI attacks will never be identified by typical residual techniques for false data identification. Most of the work on the detection of FDI attacks is based on the linearized power system model DC and does not detect attacks from the AC model. Also, the overwhelming majority of current FDIA recognition approaches focus on FDIA, whilst significant injection location data cannot be achieved. Building on the continuous developments in deep learning, we propose a Deep Learning based Locational Detection technique to continuously recognize the specific areas of FDIA. In the development area solver gap happiness is a False Data Detector (FDD) that incorporates a Convolutional Neural Network (CNN). The FDD is established enough to catch the fake information. As a multi-label classifier, the following CNN is utilized to evaluate the irregularity and cooccurrence dependency of power flow calculations due to the possible attacks. There are no earlier statistical assumptions in the architecture proposed, as they are "model-free." It is also "cost-accommodating" since it does not alter the current FDD framework and it is only several microseconds on a household computer during the identification procedure. We have shown that ANN-MLP, SVM-RBF, and CNN can conduct locational detection under different noise and attack circumstances through broad experience in IEEE 14, 30, 57, and 118 bus systems. Moreover, the multi-name classification method used successfully improves the precision of the present identification.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.14 no.1
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• pp.259-264
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• 2014

IEEE 802.15.4 has been emerging as the popular choice for various monitoring and control applications. In this paper, a fault management system for DC power-lines has been designed using IEEE 802.15.4, in order to monitor DC power-lines in real time, and to rapidly detect faults and shut off the line where such faults occur. Numbers were allocated for each node and unslotted CSMA-CA method of IEEE 802.15.4 was used, the performance of which was analyzed by a simulation. For such purpose, a total of 60 bits of the control data consisting of 16 bits of the current, 16 bits of the amplitude, 28 bits of the terminal state data were sent out, and the packet transfer rate and the transmission delay time of the fault management system for DC power-lines were measured and analyzed. When the traffic load was 330 packets per second or lower, the average delay time was shown to be shorter than 0.02 seconds, and when the traffic load was 260 packets per second or lower, the packet transfer rate was shown to be 99.99% or higher. Therefore, it was confirmed that the stringent condition of US Department of Energy (DOE) could be satisfied if the traffic load was 260 packets per second or lower, The results of this study can be utilized as basic data for the establishment of the fault management system for DC power-lines using IEEE 802.15.4.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.17 no.3
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• pp.685-690
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• 2013

This paper has proposed a multi-channel and wide gain-range baseband circuit blocks for the IEEE 802.15.4g MR-OFDM SUN systems. The proposed baseband circuit blocks consist of two negative-feedback VGAs, an active-RC 5th-order chebyshev low-pass-filter, and a DC-offset cancellation circuit. The proposed baseband circuit blocks provide 1 dB cut-off frequencies of 100 kHz, 200 kHz, 400 kHz, and 600 kHz respectively, and achieve a wide gain-range of +7 dB~+84 dB with 1 dB step. In addition, a DC-offset cancellation circuit has been adopted to mitigate DC-offset problems in direct-conversion receiver. Simulation results show a maximum input differential voltage of $1.5V_{pp}$ and noise figure of 42 dB and 37.6 dB at 5 kHz and 500 kHz, respectively. The proposed I-and Q-path baseband circuits have been implemented in $0.18-{\mu}m$ CMOS technology and consume 17 mW from a 1.8 V supply voltage.

• The Journal of the Korea institute of electronic communication sciences
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• v.17 no.5
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• pp.815-824
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• 2022

The growing integration of intermittent renewable sources like offshore wind energy increases the need for transferring electric energy over long distances, which may include sea crossings. One of the solutions available for bulk electric power transmission across large distances encompassing wide and deep sea is using HVDC submarine power cables. However, there are no standards or research related to the calculation of the continuous allowable current with various ocean conditions of a DC power cable that does not have an alternating magnetic field. In this study, assuming the typical two types of subsea cable models and two areas of the south coast and the west coast marine conditions, a continuous allowable current simulation of DC cables was performed. As a simulation result, the DC cable continuous allowable current find out the gradient reduction characteristics based on subsea base depth.

• Journal of Korea Society of Industrial Information Systems
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• v.29 no.3
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• pp.41-49
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• 2024

In this paper, we validate simulation results for the design optimization of a Superconducting Fault Current Limiter (SFCL) intended for use in Medium Voltage Direct Current systems (MVDC). With the increasing integration of renewable energy and grid connections, researchers are focusing on medium-voltage systems for balancing energy in new and renewable energy networks, rather than traditional transmission or distribution networks. Specifically, for DC distribution networks dealing with fault currents that must be rapidly blocked, current-limiting systems like superconducting current limiters offer distinct advantages over the operation of DC circuit breakers. The development of such superconducting current limiters requires finite element analysis (FEM) and an extensive design process before prototype production and evaluation. To expedite this design process, the design outcomes are assimilated using a Reduced Order Model (ROM). This approach enables the verification of results akin to finite element analysis, facilitating the optimization of design simulations for production and mass production within existing engineering frameworks.

• The Transactions of the Korean Institute of Power Electronics
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• v.18 no.4
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• pp.305-311
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• 2013

This paper proposes a performance improvement of existing single-phase current-fed qZ-Source inverter. Voltage gain of the traditional voltage-fed full-bridge inverter and single-phase current-fed qZ-source inverter is only equal to or smaller than input voltage. The proposed inverter can obtain twice higher voltage gain than the single-phase current-fed qZ-Source inverter by adding an extra switch and a capacitor in the circuit. In addition, the proposed inverter shares the common ground between dc input and ac output voltage. Therefore, the proposed inverter can eliminate the possible ground leakage current problem when it is used for grid-tied photovoltaic inverter system. A 120 W prototype inverter is built and tested to verify performances of the proposed inverter.