• Journal of the Korean Institute of Telematics and Electronics
• /
• v.27 no.2
• /
• pp.111-117
• /
• 1990

This paper investigated the effect of the zero on the right-half-plane on stability in the buck-boost DC-DC converter which is one type of the switching regulator, and the stability region in connection with the output current was shown by evaluating the feed-back gain. From the result it is shown that the stability decreases by the existence of the zero on the right-half-plane. We carried out a compensation by a pole in the feedback circuit and obtained the available stability region in relation to the gain band-width product. These results proved to be the validity by experiment.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.46 no.11
• /
• pp.16-23
• /
• 2009

A 12b 10MS/s pipelined ADC with low DC gain amplifiers is presented. The pipelined ADC using a reference scaling technique is proposed to compensate the gain error in MDACs due to a low DC gain amplifier. To minimize the performance degradation of the ADC due to amplifier offset, the proposed offset trimming circuit is employed m the first-stage MDAC amplifier. Additional reset switches are used in all MDACs to reduce the memory effect caused by the low DC gain amplifier. The measured differential and integral non-linearities of the prototype ADC with 45dB DC gain amplifiers are less than 0.7LSB and 3.1LSB, respectively. The prototype ADC is fabricated in a $0.35{\mu}m$ CMOS process and achieves 62dB SNDR and 72dB SFDR with 2.4V supply and 10MHz sampling frequency while consuming 19mW power.

• Proceedings of the Korean Institute of Intelligent Systems Conference
• /
• 2004.04a
• /
• pp.153-156
• /
• 2004

This Paper deals with speed control of DC servo motor using a Fuzzy-Sliding observer. Speed sensor detect a speed of rotor continuously. But It have a limit as a driving speed to detect speed precisely. So it is problem to improve the performance of the driving system To solve the problem, it is studied to detect a speed of DC motor without sensor In particular, study on the method to estimate the speed using the observer is performed a lot. In this parer, the gain of the observer is properly set up using the fuzzy control and sliding observer that have a superior transient characteristic and is easy to implement compared the exist ing method is designed. It estimate the derivative of the armature current directly using the armature current measured in the DC motor. It estimate the speed of the rotor using the differentiation. It is Proposed speed sensor less control method using the estimated speed. Optimal gain of Luenberger observer is set up using the fuzzy control and adapted speed control of DC servo motor. It is proved excellence and feasibility of the presented observer from the comparison tested a case with a speed sensor and a case without a speed sensor which used a highly efficient drive and 200W DC servo motor start ing system.

• The Transactions of the Korean Institute of Electrical Engineers P
• /
• v.57 no.3
• /
• pp.244-249
• /
• 2008

This paper deals with speed control of DC servo motor using a Fuzzy tuning observer. Speed sensor detect a speed of rotor continuously. But it have a limit as a driving speed to detect speed precisely. So it is problem to improve the performance of the driving system. To solve the problem, it is studied to detect a speed of DC motor without sensor. In particular, study on the method to estimate the speed using the observer is performed a lot. In this parer, the gain of the observer is properly set up using the fuzzy observer. The fuzzy observer has a superior transient characteristic and is easy to implement compared the existing method is designed. It estimate the derivative of the armature current directly using the armature current measured in the DC motor. It estimate the speed of the rotor using the differentiation. It is proposed speed sensorless control method using the estimated speed. Optimal gain of Luenberger observer is set up using the fuzzy observer and adapted speed control of DC servo motor low speed operation. It is proved excellence and feasibility of the presented observer from the comparison tested a case with a speed sensor and a case without a speed sensor which used a highly efficient drive and 200W DC servo motor starting system.

• Proceedings of the KIPE Conference
• /
• 2019.07a
• /
• pp.11-13
• /
• 2019

This paper proposes a novel high step-up non-isolated DC-DC converter, suitable for regulating dc bus in various inherent low voltage micro sources especially for photovoltaic (PV) and fuel cell sources. This novel high voltage Non-isolated Boost DC-DC converter topology is best replacement, where high voltage conversion ratio is required without the transformer and also need continuous input current. Since the proposed topology utilizes the stack-based structure, the voltage gain, and the efficiency are higher than other conventional non-isolated converters. Switches in this topology is easier to control since its control signal is grounding reference. Also, there is no need of extra gate driver and extra power supply for driver circuit, which reduces the cost and size of system. In order to show the feasibility and practicality of the proposed topology principle operation, steady state analysis and simulation result is presented and analyzed in detail. To verify the performance of proposed converter and theoretical analysis 360W laboratory prototype is implemented.

• Journal of Electrical Engineering and Technology
• /
• v.12 no.4
• /
• pp.1484-1494
• /
• 2017

We present a two-stage inverter with high step-up conversion ratio engaging modified finite-set Model Predictive Control (MPC) for utility-integrated photovoltaic (PV) applications. The anticipated arrangement is fit for low power PV uses, the calculated efficiency at 150 W input power and 19 times boosting ratio was around 94%. The suggested high-gain dc-dc converter based on Cockcroft-Walton multiplier constitutes the first-stage of the offered structure, due to its high step-up ability. It can boost the input voltage up to 20 times. The 3S current-source inverter constitutes the second-stage. The 3S current-source inverter hires three semiconductor switches, in which one is functioning at high-frequency and the others are operating at fundamental-frequency. The high-switching pulses are varied in the procedure of unidirectional sine-wave to engender a current coordinated with the utility-voltage. The unidirectional current is shaped into alternating current by the synchronized push-pull configuration. The MPC process are intended to control the scheme and achieve the subsequent tasks, take out the Maximum Power (MP) from the PV, step-up the PV voltage, and introduces low current with low Total Harmonic Distortion (THD) and with unity power factor with the grid voltage.

• Journal of Power Electronics
• /
• v.19 no.3
• /
• pp.665-675
• /
• 2019

Renewable energy based on photovoltaic systems is beginning to play an important role to supply power to remote areas all over the world. Owing to the lower output voltage of photovoltaic arrays, high gain DC-DC converters with a high efficiency are required in practice. This paper presents a novel interleaved DC-DC boost converter with a high voltage gain, where the input terminal is interlaced in parallel and the output terminal is staggered in series (IPOSB). The IPOSB configuration can reduce input current ripples because two inductors are interlaced in parallel. The double output capacitors are charged in staggered parallel and discharged in series for the load. Therefore, IPOSB can attain a high step-up conversion and a lower output voltage ripple. In addtion, the output voltage can be automatically divided by two capacitors, without the need for extra sharing control methods. At the same time, the voltage stress of the power devices is lowered. The inrush current problem of capacitors is restrained by the inductor when compared with high gain converters with a switching-capacitor structure. The working principle and steady-state characteristics of the converter are analyzed in detail. The correctness of the theoretical analysis is verified by experimental results.

• Proceedings of the KIPE Conference
• /
• 2015.07a
• /
• pp.229-230
• /
• 2015

This paper presents practical details about control-loop design and dynamic analysis for a voltage-mode controlled isolated double step-down DC-DC converter. Graphical loop gain method is used to design the feedback compensation and analyze the closed-loop performance of isolated double step-down DC-DC converter. The results of the control design and closed-loop analysis are validated by experiments on a prototype converter.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.48 no.7
• /
• pp.23-29
• /
• 2011

A dB-linearity improved variable gain amplifier (VGA) for GPS receiver is presented. The Proposed dB-linear current generator has improved dB-linearity error of ${\pm}0.15$dB. The VGA for GPS is designed using proposed dB-linear current generator and composed of 3 stage amplifiers. The IF frequency is assumed as 4MHz and the linearity requirement of the VGA for GPS receiver is defined as 24dBm of IIP3 using cascaded IIP3 equation and the VGA satisfies 24dBm when minimum gain mode. The DC-offset voltage is eliminated using DC-offset cancelation loop. The gain range is from -8dB to 52dB and the dB-linearity error satisfies ${\pm}0.2$dB. The 3-dB frequency has range of 35MHz~106MHz for the gain range. The VGA is designed using 0.18${\mu}m$ CMOS process. The power consumption is 3mW with 1.8V supply voltage.

• Journal of IKEEE
• /
• v.14 no.2
• /
• pp.90-97
• /
• 2010

The high efficiency power management IC(PMIC) with DTMOS(Dynamic Threshold voltage MOSFET) switching device and DTMOS Error Amplifier is presented in this paper. PMIC is controlled with PWM control method in order to have high power efficiency at high current level. Dynamic Threshold voltage CMOS(DT-CMOS) with low on-resistance is designed to decrease conduction loss. The control parts in Buck converter, that is, PWM control circuits consist of a saw-tooth generator, a band-gap reference circuit, an DT-CMOS error amplifier and a comparator circuit as a block. the proposed DT-CMOS Error Amplifier has 72dB DC gain and 83.5deg phase margin. also Error Amplifier that use DTMOS more than CMOS showed power consumption decrease of about 30%. DC-DC converter, based on Voltage-mode PWM control circuits and low on-resistance switching device is achieved the high efficiency near 96% at 100mA output current. And DC-DC converter is designed with Low Drop Out regulator(LDO regulator) in stand-by mode which fewer than 1mA for high efficiency.