• Title/Summary/Keyword: DC gain

Search Result 556, Processing Time 0.029 seconds

A 2-stage CMOS operational amplifier with temperature compensation function for sensor signal processing (센서 신호 처리를 위한 온도 보상 기능을 가진 2단 CMOS 연산 증폭기)

  • Ha, Sang-Min;Seo, Sang-Ho;Shin, Jang-Kyoo
    • Journal of Sensor Science and Technology
    • /
    • v.18 no.4
    • /
    • pp.280-285
    • /
    • 2009
  • In this paper, we designed a 2-stage CMOS operational amplifier with temperature compensation function using 2-poly 4-metal 0.35 $\mu$m standard CMOS technology. Using two bias circuits, the positive temperature coefficient(PTC) and the negative temperature coefficient(NTC) of the bias circuit are canceled out each other. When reference current circuit is simulated that it has a temperature coefficient of -150 ppm/$^{\circ}C$ with a temperature change from 0 $^{\circ}C$ to 120 $^{\circ}C$. Also the proposed circuit has a temperature coefficient of -0.011 dB/$^{\circ}C$ of DC open loop gain with the same temperature range.

A Study on the Design and Implementation of SDLA for C-Band Application (C-Band용 SDLA의 설계 및 구현에 관한 연구)

  • 임경택;윤기방;조홍구
    • Proceedings of the Korea Society for Industrial Systems Conference
    • /
    • 2000.11a
    • /
    • pp.711-727
    • /
    • 2000
  • In this paper, the design of the successive detection logarithmic amplifier(SDLA) is reviewed for radar and EW system, and implemented in hybrid MIC. The SDLA operates over the 5 to 7㎓ frequency range. the unit has a dynamic range of -80㏈m to 0㏈m, a logging accuracy of ±1.4㏈, a legging slope 19.2㎷/㏈, and a gain flatness of ± 1.2㏈. Input VSWR of less than 2, noise figure of 2㏈, video impedance of 900Ω and output voltage range of 0 to 1.53V DC have been obtained over 80㏈ of dynamic range.

  • PDF

Improved Transmitter Power Efficiency using Cartesian Feedback Loop Chip

  • Chong, Young-Jun;Lee, Il-Kyoo;Oh, Seung-Hyeub
    • Journal of electromagnetic engineering and science
    • /
    • v.2 no.2
    • /
    • pp.93-99
    • /
    • 2002
  • The Cartesian loop chip which is one of key devices in narrow-band Walky-Talky transmitter using RZ-SSB modulation method was designed and implemented with 0.35 Um CMOS technology. The reduced size and low cost of transmitter were available by the use of direct-conversion and Cartesian loop chip, which improved the power efficiency and linearity of transmitting path. In addition, low power operation was possible through CMOS technology. The performance test results of transmitter showed -23 dBc improvement of IMD level and -30 dEc below suppression of SSB characteristic in the operation of Cartesian loop chip (closed-loop). At that time, the transmitting power was about 37 dBm (5 W). The main parameters to improve the transmitting characteristic and to compensate the distortion in feed back loop such as DC-offset, loop gain and phase value are interfaced with notebook PC to be controlled with S/W.

Laser Doppler Vibrometer using the Bulk Homodyne Interferometer (호모다인 간섭계를 이용한 레이저 진동 측정기의 개발)

  • 라종필;경용수;왕세명;김경석;박기환
    • Proceedings of the Korean Society for Noise and Vibration Engineering Conference
    • /
    • 2003.05a
    • /
    • pp.397-402
    • /
    • 2003
  • The FM demodulation method for a bulk homodyne laser interferometer is presented. The Doppler frequency that represents the surface velocity of a vibrating object is obtained by using the bulk homodyne laser interferometer, and converted to the voltage signal by using the proposed analogue FM demodulation circuit. The DC offsets of the interferent signals that are obtained from the bulk homodyne interferometer are eliminated by using a simple subtraction. The new method for compensation of the asymmetry of each channels is presented. The light power variation of the interferometer is normalized by using the Auto Gain Controller(AGC). The proposed FM demodulation algorithm is proved by the theoretical method, and validated by the experimental results. In experiments, the proposed FM demodulation algorithm is compared with the conventional demodulation methods.

  • PDF

A 1.2-V 0.18-${\mu}m$ Sigma-Delta A/D Converter for 3G wireless Applications

  • Kim, Hyun-Joong;Jung, Tae-Sung;Yoo, Chang-sik
    • Proceedings of the IEEK Conference
    • /
    • 2006.06a
    • /
    • pp.627-628
    • /
    • 2006
  • A low-voltage switched-capacitor $2^{nd}$-order $\Sigma\Delta$ modulator using full feed-forward is introduced. It has two advantages: the unity signal transfer function and reduced signal swings inside the $\Sigma\Delta$ loop. These features greatly relax the DC gain and output swing requirements for Op-Amp in the low-voltage $\Sigma\Delta$ modulator. Implemented by a 0.18-${\mu}m$ CMOS technology, the $\Sigma\Delta$ modulator satisfies performance requirements for WCDMA and CDMA2000 standards.

  • PDF

A New Zero-Voltage-Switching Two-Transformer Boost Converter (새로운 영전압 스위칭 2-트랜스포머 승압형 컨버터)

  • Park, Ki-Bum;Kim, Chong-Eun;Moon, Gun-Woo;Youn, Myung-Joong
    • Proceedings of the KIPE Conference
    • /
    • 2005.07a
    • /
    • pp.292-294
    • /
    • 2005
  • A new zero voltage switching (ZVS) 2-transformer boost converter is proposed in this paper. The proposed converter has the advantage that the magnetizing inductor of the transformer acts for the boost inductor without additional inductor. Moreover, ZVS of main switches and auxiliary switches can be achieved, and the switch turn-off surge problem of conventional isolated boost converter is effectively solved. The operational principle, DC voltage gain, and ZVS characteristics are analyzed. To confirm the validity of the proposed converter, simulation results with 200w, 24Vdc/200Vdc specification are presented.

  • PDF

Brushless DC Motor Control for Photovoltaic Water-Pumping System (PV Water Pumping 시스템을 위한 BLDC 모터 제어)

  • 김성남;최성호;조정민;전기영;이승환;한경희
    • The Transactions of the Korean Institute of Electrical Engineers P
    • /
    • v.50 no.3
    • /
    • pp.109-116
    • /
    • 2001
  • In this paper, we adapted BLDC motor to PV water pumping systems to maintain high efficiency in the wide speed area. Also, to design confidence we adapted the vector control that drive the maximum torque at each speed limit. We designed optimal gain value of current, speed and pressure PI controller. Inverter gate pulse used Space Vector PWM to reduce torque pulsation of BLDC motor. According to, it was improve general matters of high water storage tank method by direct water supply pumping method.

  • PDF

A Study on Design of Two-Stage LNA for Ku-Band LNB Receiving Block (Ku-Band 위성통신용 LNB 수신단의 2단 저잡음 증폭기 설계에 관한 연구)

  • Kim Hyeong-Seok;Kwak Yong-Soo
    • The Transactions of the Korean Institute of Electrical Engineers C
    • /
    • v.55 no.2
    • /
    • pp.100-105
    • /
    • 2006
  • In this paper, a low noise amplifier(LNA) in a receiver of a low noise block down converter (LNB) for direct broadcasting service(DBS) is implemented using GaAs HEMT. The LNA is designed for the bandwidth of 11.7 GHz-12.2 GHz. The two-stage LNA consists of a input matching circuit, a output matching circuit, DC-blocks and RF-chokes. Experimental results of the LNA show the noise figure less than 1.4 dB, the gain greater than 23 dB and the flatness of 1 dB in the bandwidth of 11.7 to 12.2 GHz.

Design of a Fuzzy decision maker for gain-tuning of the PID controller with signal of only (출력 신호만에 의한 PID제어기 이득 조절용 Fuzzy판단자의 설계)

  • Jeong, K.C.;Kim, M.S.;Lee, H.Y.
    • Proceedings of the KIEE Conference
    • /
    • 1998.11b
    • /
    • pp.496-498
    • /
    • 1998
  • This paper presents a mathod of reducing hunting size or steady state error occurred in the output signals via regulating the PID controllers gains. The PID controllers are widely used in industrial processes. Such processes have several inherent features like continuous operation, fixed set value, and difficulty in applyirty test signals. Thus, this paper suggests fuzzy rules of reducing hunting magnitude or steady state error using output signals only. Such an intelligent tuning technique utilizes both the experts, experience and control engineers' theortical background. For two kinds of systems such as temperature or DC motors speed control, we showed the validity of proposed method in this paper.

  • PDF

A Study on the PWM Controller of DC-AC Inverter using the Multiprocessor System (다중프로세서 방식을 사용한 직류-교류변환기의 펄스폭변조제어에 관한 연구)

  • 이윤종;이성백
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.12 no.5
    • /
    • pp.505-518
    • /
    • 1987
  • In this paper, the 2-level and 3-level types of PWM technique have been analyzed, and a multiprocessor has been designed as controller for these two types of PWM inverters. Designed multiprocessor employing a hierarchical structure of a SUPERVISORY PROCESSOR which interconnects three LOCAL PROCESSOR through a common memory technique has showed as elaborate digital control characteristic. Using this multiprocessor configuration the system could gain a great degree of freedom in change of software. Also software was simpler than a single processor configuration.

  • PDF