• Journal of the Microelectronics and Packaging Society
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• v.9 no.2
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• pp.27-31
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• 2002

In this study, $CeO_2$ thin films were etched with an addition of $Cl_2$ gas to $Ar/CF_4$ gas mixing in an inductively coupled plasma (ICP) etcher by the etching parameter such as RF power of 700 W, chamber pressure of 15 mTorr and dc bias voltage of -200 volts. The etch rate of $CeO_2$ films was 250 $\AA$/min with an addition of 10% $Cl_2$ gas to $Ar/CF_4$ gas mixture and the selectivity to SBT film was 0.4 at that condition. The surface reactions of the etched $CeO_2$ thin films were investigated by X-ray photoelectron spectroscopy (XPS). It was analyzed that Ce peaks were mainly observed in Ce-O bonds formed $CeO_2$ or $Ce_2O_3$ compounds. Cl peaks were detected by the peaks of Cl $2p_{3/2}$ and Cl $2p_{1/2}$. Almost all of Cl atoms were combined with Ce atoms like $CeCl_x$ or $Ce_x/O_yCl_z$ compounds.

• Korean Journal of Materials Research
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• v.3 no.4
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• pp.327-335
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• 1993

Using a RF cylindrical magnetron operated with two electromagnets having a Helmholz configuration, RF magnetron plasma properties and characteristics of reactive ion ething of Si were investigated as a function of applied magnetic field strengths using 3mTorr $CF_4/H_2$ and $CHF_3$. Also, I-V characteristics of Schottky diodes, which were made of silicons etched under different applied magnetic field strengths and gas environments, were measured to investigate the degree of radiation damage during the reactive ion etching. As the magnetic field strent;th increased, ion densities and radical densities of the plasmas were increased linearly, however, the dc self-bias voltages induced on the powered electrode, where the specimen are located, were decreased exponentially. Maximum etch rates, which were 5 times faster than that etched without applied magnetic filed, were obtained using near lOOGauss, and, under these conditions, little or no radiation damages on the etched silicons were found.

• Journal of Navigation and Port Research
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• v.27 no.5
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• pp.505-511
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• 2003

In this paper, a driving amplifier stage with 1 Watt output has been designed and fabricated, which is operating at UHF band( 470 ∼ 806 MHz) for digital TV repeater. In the driving amplifier stage, preamplifier and 1 Watt unit amplifier are integrated by one electric substrate which is 2.53 in dielectric constant and 0.8 mm thickness. When the driving amplifier stage is flown by bias voltage of 28 V DC and current of 900 mA. it has the gain of more than 53.5 dB. the gain flatness of $\pm$0.5 dB and return loss of less than -15 dB in 470 ∼ 806 MHz. Also, when two signals at 2 MHz frequency interval are input port into the driving amplifier stage with 1 Watt output, it resulted in excellent characteristics to designed specification with showing intermodulation distortion characteristics of more than 48 dBc.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.13 no.2
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• pp.348-354
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• 2009

It has analyzed that the device degradation by NBTI (Negative Bias Temperature Instability) stress induced the increase of gate-induced-drain-leakage(GIDL) current for p-MOSFETs. It is shown that the degradation magnitude, as well as its time, temperature, and field dependence, is govern by interface traps density at the silicon/oxide interface. from the relation between the variation of threshold voltage and subthreshold slope, it has been found that the dominant mechanism for device degradation is the interface state generation. From the GIDL measurement results, we confined that the EHP generation in interface state due to NBTI stress led to the increase of GIDL current. Therefore, one should take care of the increased GIDL current after NBTI stress in the ultra-thin gate oxide device. Also, the simultaneous consideration of reliability characteristics and dc device performance is highly necessary in the stress engineering of nanoscale CMOSFETs.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.36D no.5
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• pp.29-35
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• 1999

Inductively coupled plsama etching of platinum thin film was studied using $O_2$ addition to $Cl_2$/Ar gas plasma. In this study, Pt etching mechanism was investigated with Ar/$Cl_2$ /$O_2$ gas plasma by using XPS and QMS. Ion current density was measured with Ar/$Cl_2$ /$O_2$ gas plasma by using single Langmuir probe. It was confirmed by using QMS and single Langmuir probe that Cl and Ar species rapidly decreased and ion current density was also decreased with increasing $O_2$ gas ratios. These results implied that the decrease of Pt etch rate is due to the decrease of reactive species ans ion current density with increasing $O_2$ gas mixing ratios. A maximum etch rate of 150nm/min and the oxide selectivity of 2.5 were obtained at Ar/$Cl_2$ /$O_2$ flow rate of 50 seem, RF power of 600 W, dc bias voltage of 125 V, and the total pressure of 10 mTorr.

• Journal of the Korean Society of Industry Convergence
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• v.17 no.3
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• pp.103-112
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• 2014

BY the Transformers and reactors, the input electrical energy is converted into magnetic energy. At the end through the magnetic energy was passed at the output parameter. Specially At the flyback transformer or a reactor airgap were designed to contain more magnetic energy. But that work is very difficult for the optimal design. It is that Contradictions are between the length of the Air-gap, Winding inductance, DC bias. As to e Several conflicting conditions in order to determine the optimum Air-gap has a lot of experience and trial & error is necessary. The approach proposed in this paper, the auxiliary winding on the core attached to part of primary core, that by applying a DC voltage has a dramatic effect like Core with designed Air-gap. This inventiveness and advantage is to regulate arbitrarily the Saturation Flux Quantity by the input signal to secondary winding. Accordingly obtained the biggest effect is that increasing limits of the saturation current destined by the material and shape of the conventional core. In other words, that can decreas the size of the transformer and reactor, While maintaining the current saturation capacity. This paper, prove its effect as using the local flux saturation in transformers and reactors for research by the computer program using the finite element method (FEM) simulation, followed by actual experiment to verify

• The Journal of Korean Institute of Communications and Information Sciences
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• v.38B no.6
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• pp.427-434
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• 2013

In this paper, the design and layout of a 2.5 Gbps arrayed VCSEL driver for optical transceiver having arrayed multi-channel of integrating module is confirmed. In this paper, a 4 channel 2.5 Gbps VCSEL (vertical cavity surface emitting laser) driver array with automatic optical power control is implemented using $0.18{\mu}m$ CMOS process technology that drives a $1550{\mu}m$ high speed VCSEL used in optical transceiver. To enhance the bandwidth of the optical transmitter, active feedback amplifier with negative capacitance compensation is exploited. We report a distinct improvement in bandwidth, voltage gain and operation stability at 2.5Gbps data rate in comparison with existing topology. The 4-CH chip consumes only 140 mW of DC power at a single 1.8V supply under the maximum modulation and bias currents, and occupies the die area of $850{\mu}m{\times}1,690{\mu}m$ excluding bonding pads.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.35C no.9
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• pp.64-72
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• 1998

In this paper, the design of a current integrator for low-voltage, low-power, and high frequency applications using complementary high swing cascode current-mirror is presented. The proposed integrator decreases output current errors due to non-zero input resistance and non-infinite output resistance of the simple current integrator. As a design example, the 3rd order Butterworth lowpass filter is designed by a leapfrog method. Also, we apply the predistortion design method to reduce the magnitude distortion which occurs at a cutoff frequency by the undesirable phase shift of a lossless current integrator. The designed current-mode filter is simulated and examined by SPICE using 0.8$\mu\textrm{m}$ CMOS n-well process parameters. The simulation results show 20MHz cutoff frequency and 615㎼ power dissipation with a 2V power supply. And the cutoff frequency of the filters can be easily changed by the DC bias current.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.08a
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• pp.155.2-155.2
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• 2013

Strain-relaxed SiGe layer on Si substrate has numerous potential applications for electronic and opto- electronic devices. SiGe layer must have a high degree of strain relaxation and a low dislocation density. Conventionally, strain-relaxed SiGe on Si has been manufactured using compositionally graded buffers, in which very thick SiGe buffers of several micrometers are grown on a Si substrate with Ge composition increasing from the Si substrate to the surface. In this study, a new plasma process, i.e., the combination of PIII&D and HiPIMS, was adopted to implant Ge ions into Si wafer for direct formation of SiGe layer on Si substrate. Due to the high peak power density applied the Ge sputtering target during HiPIMS operation, a large fraction of sputtered Ge atoms is ionized. If the negative high voltage pulse applied to the sample stage in PIII&D system is synchronized with the pulsed Ge plasma, the ion implantation of Ge ions can be successfully accomplished. The PIII&D system for Ge ion implantation on Si (100) substrate was equipped with 3'-magnetron sputtering guns with Ge and Si target, which were operated with a HiPIMS pulsed-DC power supply. The sample stage with Si substrate was pulse-biased using a separate hard-tube pulser. During the implantation operation, HiPIMS pulse and substrate's negative bias pulse were synchronized at the same frequency of 50 Hz. The pulse voltage applied to the Ge sputtering target was -1200 V and the pulse width was 80 usec. While operating the Ge sputtering gun in HiPIMS mode, a pulse bias of -50 kV was applied to the Si substrate. The pulse width was 50 usec with a 30 usec delay time with respect to the HiPIMS pulse. Ge ion implantation process was performed for 30 min. to achieve approximately 20 % of Ge concentration in Si substrate. Right after Ge ion implantation, ~50 nm thick Si capping layer was deposited to prevent oxidation during subsequent RTA process at $1000^{\circ}C$ in N2 environment. The Ge-implanted Si samples were analyzed using Auger electron spectroscopy, High-resolution X-ray diffractometer, Raman spectroscopy, and Transmission electron microscopy to investigate the depth distribution, the degree of strain relaxation, and the crystalline structure, respectively. The analysis results showed that a strain-relaxed SiGe layer of ~100 nm thickness could be effectively formed on Si substrate by direct Ge ion implantation using the newly-developed PIII&D process for non-gaseous elements.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.24 no.12
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• pp.1167-1172
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• 2013

This paper presents a X-band doppler radar with high conversion gain using a self-oscillating-mixer(SOM) that oscillation and frequency mixing is realized at the same time. To improve phase noise of the SOM oscillator, a ${\lambda}/2$ slotted square patch resonator(SSPR) was proposed, which shows high Q-factor of 175.4 and the 50 % reduced circuit area compared to the conventional resonator. To implement the low power system, low biasing voltage of 1.7 V was supplied. To enhance the conversion gain of the SOM, bias circuit is configured near the pinch-off region of transistor, and the conversion gain was optimized. The output power of the proposed SOM was -3.16 dBm at 10.65 GHz. A high conversion gain of 9.48 dB was obtained whereas DC Power consumption is relatively low about 7.65 mW. The phase noise is -90.91 dBc/Hz at 100 kHz offset. The figure-of-merit(FOM) of the proposed SOM was measured as -181.8 dBc/Hz, which is supplier to other SOMs by more than about 7 dB.