• Proceedings of the KIEE Conference
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• 1988.07a
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• pp.563-566
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• 1988

A current-controlled CMOS operational transconductance amplifier(OTA), whose transconductance is directly proportional to the DC bias current, has been developed for many electronic circuit applications. It features that its transconductance is insensitive to temperature unlike that of the bipolar OTA. This property makes it possible to use the proposed OTA as a basic buliding block in electrically variable circuit design. The SPICE simulation shows that the conversion sensitivity of the circuit is 44.62 mv /${\mu}A$ and the linearity error less than 0.54 % over a bias current range from 2 ${\mu}A$ to 120 ${\mu}A$ when the output is loaded with a 1${\Omega}$ resistor.

• Journal of the Korean Ceramic Society
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• v.40 no.10
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• pp.921-924
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• 2003

A current-voltage relation for Positive Temperature Coefficient of Resistance (PTCR) ceramic was derived and compared with the experimental data. The new current-voltage relation was developed based on Heywangs double Schottky barrier model and a bias distribution across the grain boundary. The voltage limitation V < 4${\Phi}$$\sub$b/ suggested by Heywang is no longer necessary in the new expression for the voltage dependence of the resistance. The pulsed voltages were applied to the PTCR ceramic specimen in order to avoid possible temperature variation during the measurement.

• Journal of Power Electronics
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• v.12 no.2
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• pp.242-248
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• 2012

Self oscillating current fed push pull resonant inverters can be controlled without using special drivers. Dc current flows through the choke coil and the power switches, although the driving signals of the power switches are sinusoidal. When the base current is near zero, the transistors cannot be operated in switching mode. Hence higher switching power losses and instantaneous peak power during off transitions are observed. In this study, an alternative design has been proposed to overcome this problem. A prototype circuit has been built which provides dc bias current to the base of the transistors. Experimental results are compared with theoretical calculations to demonstrate the validity of the design. The proposed design decreases the peak and average power losses by about 8 times, when compared to conventional designs.

• Corrosion Science and Technology
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• v.9 no.6
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• pp.276-280
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• 2010

Copper(Cu) as an interconnecting metal layer can replace aluminum (Al) in IC fabrication since Cu has low electrical resistivity, showing high immunity to electromigration compared to Al. However, it is very difficult for copper to be patterned by the dry etching processes. The chemical mechanical polishing (CMP) process has been introduced and widely used as the mainstream patterning technique for Cu in the fabrication of deep submicron integrated circuits in light of its capability to reduce surface roughness. But this process leaves a large amount of residues on the wafer surface, which must be removed by the post-CMP cleaning processes. Copper corrosion is one of the critical issues for the copper metallization process. Thus, in order to understand the copper corrosion problems in post-CMP cleaning solutions and study the effects of DC biases and post-CMP cleaning solution concentrations on the Cu film, a constant voltage was supplied at various concentrations, and then the output currents were measured and recorded with time. Most of the cases, the current was steadily decreased (i.e. resistance was increased by the oxidation). In the lowest concentration case only, the current was steadily increased with the scarce fluctuations. The higher the constant supplied DC voltage values, the higher the initial output current and the saturated current values. However the time to be taken for it to be saturated was almost the same for all the DC supplied voltage values. It was indicated that the oxide formation was not dependent on the supplied voltage values and 1 V was more than enough to form the oxide. With applied voltages lower than 3 V combined with any concentration, the perforation through the oxide film rarely took place due to the insufficient driving force (voltage) and the copper oxidation ceased. However, with the voltage higher than 3 V, the copper ions were started to diffuse out through the oxide film and thus made pores to be formed on the oxide surface, causing the current to increase and a part of the exposed copper film inside the pores gets back to be oxidized and the rest of it was remained without any further oxidation, causing the current back to decrease a little bit. With increasing the applied DC bias value, the shorter time to be taken for copper ions to be diffused out through the copper oxide film. From the discussions above, it could be concluded that the oxide film was formed and grown by the copper ion diffusion first and then the reaction with any oxidant in the post-CMP cleaning solution.

• Proceedings of the IEEK Conference
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• 1998.10a
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• pp.633-636
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• 1998

In this study, power AlGaAs/InGaAs/GaAs PM-HEMT's for mm wave's were fabricated using Electron beam lithography and air-bridge techniques, and so on. DC and AC characteristics of the fabricated power PM-HEMTs were measured under the various bias conditions. For example, DC and RF characteristics such as S21 gain of 3.6 dB at 35 ㎓, current gain cut-off frequencies of 45 ㎓ and maximum oscillation frequencies of 100 ㎓ were carefully analyzed for design methodology of sub-mm wave power devices.

• Journal of Advanced Marine Engineering and Technology
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• v.30 no.8
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• pp.901-906
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• 2006

In this paper, the power amplifier using active bias circuits for LDMOS(Lateral Diffused Metal Oxide Semiconductor) MRF-21180 is designed and fabricated. According to change the temperature, the gate voltage of LDMOS is controlled by the fabricated active bias circuits which is made of PNP transistor to suppress drain current. The driving amplifier using MRF-21125 and MRF-21060 is made to drive the LDMOS MRF-21180 power amplifier. The variation of current consumption in the fabricated 60 watt power amplifier has an excellent characteristics of less than 0.1 A, whereas a passive biasing circuit dissipates more than 0.5 A. The implemented power amplifier has the gain over 9 dB, the gain flatness of less than $\pm$0.1 dB and input and output return loss of less than -6 dB over the frequency range 2.11 $\sim$ 2.17 GHz. The DC operation point of this power amplifier at temperature variation 0 $^{\circ}C$ to 60 $^{\circ}C$ is fixed by active bias circuit.

• Journal of the Korean Institute of Telematics and Electronics T
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• v.36T no.1
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• pp.13-18
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• 1999

The trap density by the stress bias in silicon oxides with different thicknesses has been investigated. The trap density by stress bias was shown to be composed of on time current and off time current. The on time trap density was composed of dc current. The off time trap density was caused by the tunneling charging and discharging of the trap in the interfaces. The on time trap density was used to estimate to the limitations on oxide thicknesses. The off time trap density was used to estimate the data retention in nonvolatile memory devices.

• 한국정보디스플레이학회:학술대회논문집
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• 2007.08b
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• pp.1172-1175
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• 2007

We have investigated the threshold voltage shifts(${\Delta}Vth$) and drain current level shift (${\Delta}Ids$) in subthreshold region of a-Si:H TFTs induced by DC Bias (Vgs and Vds) - Temperature stress (BTS) condition. We plotted the transfer curves and the ${\Delta}Vth$ contour maps as Vds-Vds stress bias and Temperature to examine the severe damage cases on TFTs. Also, by drawing out the time-dependent transfer curve (Ids-Vgs) in the region of $10^{-8}\;{\sim}\;10^{-13}$ (A) current level, we can estimate the failure time of TFTs in a operating condition.

• Korean Journal of Materials Research
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• v.33 no.6
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• pp.229-235
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• 2023

An all-perovskite oxide heterostructure composed of SrSnO₃/Nb-doped SrTiO₃ was fabricated using the pulsed laser deposition method. In-plane and out-of-plane structural characterization of the fabricated films were analyzed by x-ray diffraction with θ-2θ scans and φ scans. X-ray photoelectron spectroscopy measurement was performed to check the film's composition. The electrical transport characteristic of the heterostructure was determined by applying a pulsed dc bias across the interface. Unusual transport properties of the interface between the SrSnO₃ and Nb-doped SrTiO₃ were investigated at temperatures from 100 to 300 K. A diodelike rectifying behavior was observed in the temperature-dependent current-voltage (IV) measurements. The forward current showed the typical IV characteristics of p-n junctions or Schottky diodes, and were perfectly fitted using the thermionic emission model. Two regions with different transport mechanism were detected, and the boundary curve was expressed by ln I = -1.28V - 13. Under reverse bias, however, the temperature- dependent IV curves revealed an unusual increase in the reverse-bias current with decreasing temperature, indicating tunneling effects at the interface. The Poole-Frenkel emission was used to explain this electrical transport mechanism under the reverse voltages.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.65 no.11
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• pp.1919-1924
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• 2016

In general, Diode rectifier has been applied to DC traction power supply system. Diode has some characteristics which is voltage drop in inverse proportion of load because of non-controlled switch, and cannot flow a current in reverse bias. So, voltage drop occurs frequently, and regenerated power cannot use in substation. The PWM rectifier is able to control output voltage constantly to reduce voltage drop and to use regeneration power without additional inverter. This paper proposes analysis algorithm for DC traction power supply system with PWM rectifier.