• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 2003년도 ICCAS
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• pp.1876-1879
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• 2003

Due to the conventional half-bridge switch-mode converters for dc motor drive have been usually using unbalanced circuit topologies which generate common-mode currents through parasitic capacitors distributed between the ground and the dc motor frame such as the heat-sink of switching devices or the frame of the dc motor. This paper describes methods that cancel common-mode current generated in half-bridge switch-mode converters by using circuit balancing technique. The circuit balancing is to make the noise pickup or occurring in both conductor lines, signal and return pathes, is equal in amplitude and opposite in phase so that it will be canceled out in the ground plane. The common-mode current cancellation in the proposed converter is confirmed by experimental results.

• 전력전자학회논문지
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• 제20권4호
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• pp.321-329
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• 2015

The static synchronous compensator (STATCOM) of cascaded H-bridge configuration accompanying multiple separate DC sides is inherently subject to the problem of uneven DC voltages. These DC voltages in one leg can be controlled by adjusting the AC-side output voltage of each cell inverter, which is proportional to the active power. However, when the phase current is extremely small, large AC-side voltage is required to generate the active power to balance the cell voltages. In this study, an alternative zero-sequence current injection method is proposed, which facilitates effective cell balancing controllers at no load, and has no effect on the power grid because the injected zero sequence current only flows within the STATCOM delta circuit. The performance of the proposed method is verified through simulation and experiments.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2015년도 추계학술대회 논문집
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• pp.7-8
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• 2015

In this paper a cell-to-cell fast charge balancing circuit for the Lithium-Ion battery module is proposed. In the proposed topology the energy in a high voltage cell is transferred directly to a low voltage cell through the operation of the dc-dc converter. Furthermore, the charge balancing can be performed regardless of the battery operation whether it is being charged, discharged or relaxed. The monitoring circuit composed of a DSP and a battery monitoring IC is designed to monitor the cell voltage and detect the inferior cell thereby protecting the battery module from failure. In order to demonstrate the performance of the proposed topology, a prototype circuit was designed and applied to 12 Lithium-Ion battery module. It has been verified with the experiments that the charge equalization time of the proposed method was shorter compared with those of other methods.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2010년도 추계학술대회
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• pp.234-237
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• 2010

This paper proposes a balancing control of DC-link voltages of a H-bridge multilevel inverter for STATCOM application. Individual DC link voltage is controlled by simply adjusting the d-q voltage reference through a PI controller in each cell while the main controller carries out the reactive power control. The correctness and effectiveness of the method are validated by PSIM simulation with unbalanced load condition data taken from a typical arc furnace load, showing the adverse effects of load unbalance to DC link voltage significantly suppressed.

• 전력전자학회논문지
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• 제19권4호
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• pp.332-341
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• 2014

A cascaded H-bridge multi-level STATCOM(STATic synchronous COMpensator), which is composed of many cell inverters with independent dc-sources, generates inevitably dc-side voltage unbalance among phases when it compensates unbalanced load. It comes from the difference of flowing active power in each phase when this compensator makes negative-sequence current to eliminate the unbalance of source-side current. However, this unbalance can be controlled by injecting zero-sequence current which is decoupled with grid currents, so the compensator can work well during this balancing process. Both a feedback control algorithm, which produces zero-sequence current proportional to dc-side voltage unbalance within each phase, and a feedforward control algorithm, which makes zero-sequence current directly from the compensator's negative-sequence current, were proposed. The dc-side voltage of each phase can be controlled stably by these proposed algorithms in both steady-state and transient, so the compensator can have fast response to satisfy control performance under rapid changing load. These balancing controllers were implemented and verified via simulation and experiment.

• Journal of Power Electronics
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• 제16권6호
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• pp.2099-2108
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• 2016

The cascaded multilevel converter is widely adopted to medium/high voltage and high power electronic applications due to the small harmonic components of the output voltage and the facilitation of modularity. In this paper, the operation principle of a T-type H-bridge topology is investigated in detail, and a carrier phase shifted pulse width modulation (CPS-PWM) based control method is proposed for this topology. Taking a virtual five-level waveform achieved by a unipolar double frequency CPS-PWM as the output object, PWM signals of the T-type H-bridge can be obtained by reverse derivation according to its switching modes. In addition, a control method for the T-type H-bridge based cascaded multilevel converter is introduced. Then a single-phase T-type H-bridge cascaded multilevel static var generator (SVG) prototype is built, and a repetitive controller based compound current control strategy is designed with the DC-link voltage balancing control scheme analyzed. Finally, simulation and experimental results validate the correctness and feasibility of the proposed modulation method and control strategy for T-type H-bridge based cascaded multilevel converters.

• Journal of Power Electronics
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• 제17권1호
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• pp.115-126
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• 2017

This paper presents a new cascaded asymmetrical single phase multilevel converter with a reduced number of isolated DC sources and power semiconductor switches. The proposed inverter has only two H-bridges connected in cascade, one switching at a high frequency and the other switching at a low frequency. The Low Switching Frequency Inverter (LSFI) generates seven levels whereas the High Switching Frequency Inverter (HSFI) generates only two levels. This paper also presents a solution to the capacitor balancing issues of the LSFI. The proposed inverter has lot of advantages such as reductions in the number of DC sources, switching losses, power electronic devices, size and cost. The proposed inverter with a capacitor voltage balancing algorithm is simulated using MATLAB/SIMULINK. The switching logic of the proposed inverter with a capacitor voltage balancing algorithm is developed using a FPGA SPATRAN 3A DSP board. A laboratory prototype is built to validate the simulation results.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1994년도 하계학술대회 논문집 A
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• pp.373-375
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• 1994

In realizing a three-level GTO inverter, we should keep the voltage balancing of DC-link capacitors and consider minimum on/off time of GTO thyristors in order to make the same blocking voltage across each device and to minimize the harmonic components of the output voltage and current. In this raper, a new PWM scheme based on space voltage vectors, by which it is possible to keep neutral-point voltage and avoid narrow pulse, is presented. Experimental results verify that the proposed PWM control scheme is suitable fur hish power and high voltage three-level GTO inverters applied to induction motor drives.

• Journal of Power Electronics
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• 제12권2호
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• pp.344-356
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• 2012

In recent years, multilevel technology has become an effective and practical solution in the field of moderate and high voltage applications. This paper discusses an APF with a three-level NPC inverter. Obviously, the application of such converter to APFs is hindered by the problem of the voltage unbalance of DC capacitors, which leads to system instability. This paper comprehensively analyzes the theoretical limitations of the neutral-point voltage balancing problem for tracking different harmonic currents utilizing current switching functions from the space vector PWM (SVPWM) point of view. The fluctuation of the neutral point caused by the load currents of certain order harmonic frequency is reported and quantified. Furthermore, this paper presents a close-loop digital control algorithm of the DC voltage for this APF. A PI controller regulates the DC voltage in the outer-loop controller. In the current-loop controller, this paper proposes a simple neutral-point voltage control method. The neutral-point voltage imbalance is restrained by selecting small vectors that will move the neutral-point voltage in the direction opposite the direction of the unbalance. The experiment results illustrate that the performance of the proposed approach is satisfactory.

• 센서학회지
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• 제27권3호
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• pp.165-169
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• 2018

A single-axis Cubli frame realized simply with an IMU sensor and DC motor is presented herein. To maintain the balance on the Cubli frame, an LQR controller based on a Lagrangian derivation of the dynamics was designed, which utilized the state variables of the frame angle and its angular acceleration, as well as the wheel angle and its angular acceleration. The designed LQR controller showed a settling time balancing capability of approximately two seconds and 40% of the maximum overshoot in Matlab/Simulink simulations. Our experimental results of the fabricated Cubli frame matched with the simulation results. It maintained balancing at the reference position even though an initial offset as well as external disturbance during the balancing was applied.