• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.12 no.3
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• pp.432-438
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• 2001

In this paper, after applying Defected Ground Structure(DGS) to DC block, changes of gap and length of λ/4 coupled line are investigated by EM simulation and fabrication. As a result, on condition of the same output with the case using typical DC block, the gap between λ/4 coupled line is widen from 0.1 mm to 0.46 mm by 0.36 mm and the length of λ/4 coupled line gets shorter from 17.7 mm to 13.2 mm by 4.5 mm. Also three type power amplifiers using blocking capacitor, typical DC block and DGS DC block are fabricated and investigated. At first, when S parameter characteristics of each amplifier are considered at frequency band of 3.2 +-0.O5 GHz, every amplifier has similar characteristics of gain and S parameter. Second when the output power of amplifiers is 25 dBm after putting CW signal of 3.2 GHz into three type amplifiers, the difference of dominant signal and 2nd harmonic signal using blocking capacitor, typical DC block and DGS DC block is each -44.83 dBc, -66.84 dBc and -64.33 dBc. Therefore harmonic characteristics of amplifiers using typical DC block and DGS DC block is almost same.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.18 no.8
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• pp.895-903
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• 2007

Design equations of DC blocks terminated in arbitrary impedances are newly suggested and a microstrip DC block is tested for the perfect matching. The DC block is a two-port passive component and the power excited at a port is transmitted into another port. However, all the excited power at the input can not be delivered to the output and therefore most of the conventional DC blocks can not be perfectly matched with arbitrary termination impedances. To solve the matching problem, its one-port equivalent resonant circuit model, front which design equations can be derived, is newly suggested. Using the derived design equations, any DC block can be designed, perfectly matched without any restriction of coupling coefficients. To verify the derived design equations, measurements were carried out and the results are in good agreement with prediction, showing insertion and return losses at 4.1 GHz are 0.82dB and -31dB, respectively.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.14 no.2
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• pp.146-154
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• 1989

A new design method for matching GaAs FET amplifiers using DC block consisting of non-symmetrical two-microstrip line is presented. The non-symmetrical DC block has not only the function of DC block, but the function of impedance matching. Because of the above merits the non-symmetrical DC block can be used for MIC anc MMIC. The measured frequency responses exhibit a symmetrical characteristics at the center frequency, 4(GHz).

• Journal of the Korea Institute of Information Security & Cryptology
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• v.9 no.3
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• pp.27-38
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• 1999

We study on the security for the block ciphers with 20block structure which have provable security against DC and LC on the view point of higher order DC, 2-block structures are classified three types according to the location of round function such as C(Center)-type R(Right)-type and L(Left)-type We prove that in the case of 4 rounds encryption function these three types provide the equal strength against higher order DC and that in the case of 5 or more rounds R-type is weaker than C-type and L-type.

• Transactions on Electrical and Electronic Materials
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• v.18 no.2
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• pp.62-65
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• 2017

In this paper, three DC Block designs are presented which efficiently meet the need of modern-day compactsize wireless communication systems. As one of the important parts of a complete system design, the proposed microstrip-based DC block with coupled transmission lines efficiently attenuates unwanted frequencies that cause damage to the system. The compact-sized DC block structures are created by incorporating an extended coupled-line section with a radial stub, an enveloped coupled-line section, and using alternate up-down meandering techniques. The structures are analyzed for the L-Band using a high-resistive silicon substrate. At a resonating frequency of 1.575 GHz, the designed DC Block structures have a return loss better than -10 dB, an insertion loss of around -1 dB, and also possess wide pass-band characteristics.

• The Proceeding of the Korean Institute of Electromagnetic Engineering and Science
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• v.2 no.2
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• pp.3-10
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• 1991

The new structure method of GaAs microwave amplifiers using DC block function and impedance transforming property of DC block/transformer(non-symmetrical two - microstrip coupled line and interdigital three - microstrip coupled line), instead of chip capacitor, is presented. The newly structured microwave amplifier showed wideband characteristics(bandwidth, 3.5 GHz) and flat frequency response. Interdigital three - microstrip coupled line which is used for microwave amplifier can be used to match amplifiers as well as DC blocking.

• Journal of Institute of Control, Robotics and Systems
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• v.21 no.9
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• pp.827-835
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• 2015

In this paper, we present the implementation method of Dynamic Matrix Control(DMC) block for use with a Rapid Control Prototyping(RCP) system and consider the speed control of a DC motor using the developed DMC block. Firstly, we briefly introduce a lab-built RCP system. Secondly, we present a method for implementing a DMC block using C-language, which enables the DMC algorithm to be represented in a library block that can be used in a Simulink environment. Finally, we use the developed DMC block for the speed control of a DC motor, through which we show that the DMC-based control system can be easily implemented and applied to the real-time control of systems with relatively fast dynamics.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.12 no.1
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• pp.67-80
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• 2002

In this article, a new block encryption algorithm FRACTAL is introduced. FRACTAL adopts 8-round Feistel structure handling 128 hit inputs and keys. Furthermore, FRACTAL possesses the provable security against DC and LC, which are known to he the most powerful attacks on block ciphers.

• Proceedings of the IEEK Conference
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• 2008.06a
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• pp.537-538
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• 2008

A step-down DC-DC converter with On-chip Compensation for battery-operated portable electronic devices which are designed in 0.18um CMOS standard process. In an effort to improve low load efficiency, this paper proposes the PFM (Pulse Frequency modulation) voltage mode 1MHz switching frequency step-down DC-DC converter with on-chip compensation. Capacitor multiplier method can minimize error amplifier compensation block size by 20%. It allows the compensation block of DC-DC converter be easily integrated on a chip and occupy less layout area. But capacitor multiplier operation reduces DC-DC converter efficiency. As a result, this converter shows maximum efficiency over 87% for the output voltage of 1.8V (input voltage : 3.3V), maximum load current 500mA, and 0.14% output ripple voltage. The total core chip area is $mm^2$.

• Journal of IKEEE
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• v.17 no.3
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• pp.284-293
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• 2013

This paper describes a DC-DC boost converter for thermoelectric energy harvesting. The designed converter boosts the VDD through a start-up block from a low-output voltage of a thermoelectric device and the boosted VDD is used to operate the internal control block. When the VDD reaches a predefined value, a detector circuit makes the start-up block turn off to minimize current consumption. The final boosted VOUT is achieved by alternately operating the DC-DC converter for VDD and the main DC-DC converter for VOUT according to the comparator outputs. Simulation results shows that the designed converter generates 2.65V from an input voltage of 200mV and its maximum power efficiency is 63%. The area of the chip designed using a 0.35um CMOS process is $1.3mm{\times}0.7mm$ including pads.