• Journal of the Korean institute of surface engineering
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• v.32 no.3
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• pp.467-471
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• 1999

BN films were grown on silicon (l00) substrate by magnetically enhanced activated reactive evaporation (ME-ARE) with pulsed DC power instead of r.f. for substrate biasing. The deposited films were analyzed using Fourier transform infrared spectroscopy (FTIR) and transmission electron microscopy (TEM). FTIR results show that the intensity of absorption band of $sp^2$ bond of BN decreased and that of $sp^3$ bond of c-BN increased with increasing pulsed DC bias voltage applied to substrate. The initially grown layer at the interface was observed by TEM and considered to be of$ sp^2$-bonded BN. The cross-sectional and planar TEM micrographs show that the upper layer on the initial layer was the single phase c-BN. It is concluded that cubic boron nitride films could be synthesized by ME-ARE process with pulsed DC biasing.

• ETRI Journal
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• v.29 no.6
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• pp.785-793
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• 2007

In this paper, we present an integrated rail-to-rail fully differential operational transconductance amplifier (OTA) working at low-supply voltages (1.5 V) with reduced power consumption and showing high DC gain. An embedded adaptive biasing circuit makes it possible to obtain low stand-by power dissipation (lower than 0.17 mW in the rail-to-rail version), while the high DC gain (over 78 dB) is ensured by positive feedback. The circuit, fabricated in a standard CMOS integrated technology (AMS 0.35 ${\mu}m$), presents a 37 V/${\mu}s$ slew-rate for a capacitive load of 15 pF. Experimental results and high values of two quality factors, or figures of merit, show the validity of the proposed OTA, when compared with other OTA configurations.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.8 no.7
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• pp.1429-1435
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• 2004

In this work, high performance broadband amplifier MMIC including all the matching and biasing components, and electrostatic discharge (ESD) protection circuit was developed for K/Ka band applications. Therefore, external biasing or matching components were not required for the operation of the MMIC. STO (SrTiO3) capacitors were employed to integrate the DC biasing components on the MMIC, and miniaturized LC parallel ESD protection circuit was integrated on MMIC, which increased ESD breakdown voltage from 10 to 300 V. A pre-matching technique and RC parallel circuit were used for the broadband design of the amplifier MMIC. The amplifier MMIC exhibited good RF performances and good stability in a wide frequency range. The chip size of the MMICs was $1.7{\pm}0.8$ mm2.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.06a
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• pp.162-163
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• 2007

The dry etching of Si was investigated using direct dc biasing to the Si substrate. The TCP type etching system with a feed-through for applying a dc bias was used in the etching. The applied dc bias and ICP power was varied to examine the effect on the etching at the fixed chamber pressure and $SF_6$ flow rate of 10 mTorr and 10 sccm during. When the plasma was generated at ICP power of 100 W, the etch rate of Si was increased with the bias for the biased samples. However, the etching of Si for the non-biased sample was enhanced for the increased ICP power.

• Journal of Navigation and Port Research
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• v.26 no.2
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• pp.215-220
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• 2002

In this paper, the 100 watt unit ower amplifier using temperature independent biasing for DTV (Digital Television) repeater application is designed and fabricated. The DC operation point of this unit power amplifier at temperature variation from $20^{\circ}C$ to $100^{\circ}C$ is fixed by active bias circuit. The variation of current consumption in the 100 watt unit power amplifier has an excellent characteristics of less than 0.6A. The implemented unit power amplifier has the gain over 12dB, the gain flatness of less than 0.5dB and input and output return, loss of than 15dB over the DTV repeater frequency range (470~806MHz). This unit power amplifier yields intermodulation distortion(IMD) of more than 32dBc at 2MHz offset, which satisfies the IMD at output power of 100 watt (50dBm).

• Journal of electromagnetic engineering and science
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• v.17 no.2
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• pp.105-107
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• 2017

The self-biasing circuit through a feedback resistor is applied to a gallium nitride (GaN) distributed power amplifier (PA) monolithic microwave circuit (MMIC). The self-biasing circuit is a useful scheme for biasing depletion-mode compound semiconductor devices with a negative gate bias voltage, and is widely used for common source amplifiers. However, the self-biasing circuit is rarely used for PAs, because the large DC power dissipation of the feedback resistor results in the degradation of output power and power efficiency. In this study, the feasibility of applying a self-biasing circuit through a feedback resistor to a GaN PA MMIC is examined by using the high operation voltage of GaN high-electron mobility transistors. The measured results of the proposed GaN PA are the average output power of 41.1 dBm and the average power added efficiency of 12.2% over the 6-16 GHz band.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.24 no.5
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• pp.508-514
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• 2013

Substrate integrated waveguide(SIW) constructed by two metal planes and conductive vias in a dielectric substrate, have all the conductors connected each other and hence, cannot be biased by DC sources. We propose a new folded corrugated substrate integrated waveguide(FCSIW) that can be DC-biased. Since the proposed FCSIW replaces the SIW conducting vias by folded open subs, it can supply the DC sources. The FCSIW has better transmission characteristics and 30 % less width than the common corrugated substrate integrated waveguide(CSIW) having a serious leakage generation problem. The FCSIW shows better insertion loss(1.49 dB) compared with that(3.08 dB) of the CSIW measured for 154 mm length devices and averaged at 9~15 GHz frequency band. No leakage has been observed from crosstalk measurements of the FCSIW.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.38 no.2
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• pp.128-136
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• 2001

This paper evaluates the performance of an optic link in a frequency conversion based fiber-radio system. The proposed link structure simplifies a BS(base station) via making the MMW(millimeter wave) optical pilot tone generated in the CS(control station) be used in the uplink as well as in the downlink. To acquire the optical pilot tone, an EOM(electro-optic modulator) in the CS is biased in three different ways, i.e., MAB(maximum bias), MIB(minimum bias), QB(quadrature bias). We, depending on the biasing of the EOM, evaluate the link performances in two cases; one is for constant laser source power and the other for constant received DC optical power at a PD(photo detector). Based on the simulation results on the downlink CNR and the uplink SFDR(spurious free dynamic range), we finally deduce the effective EOM biasing for each case.

• Journal of Science Education
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• v.45 no.2
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• pp.219-230
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• 2021

In this study, we derived several formulas for magnetic fields and induced voltages in a parallel plate capacitor biased by DC voltages. The computer simulation based on the derived formulas reveals that the magnetic fields due to the displacement current fall within the range of 10^-10T to 10^-9T and thence the experiment for the displacement current is not possible because the magnetic field sensor used in Data Logger could measure the magnetic fields of above 10^-5T range. Contrary to this, the computer simulation confirms that the induced voltages in a toroidal coil due to the displacement current range measurable values of 0.002~0.021V. The results imply that the displacement current can be confirmed by measuring the induced voltages in a toroidal coil inserted into a parallel plate capacitor under DC biasing.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.57 no.10
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• pp.1888-1892
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• 2008

In this paper, a new parallel CMOS self-bias differential amplifier is designed to use in high-speed analog signal processing circuits. The designed parallel CMOS self-bias differential amplifier is developed by using internal biasing circuits and the complement gain stages which are parallel connected. And also, the parallel architecture of the designed parallel CMOS self-bias differential amplifier can improve the gain and gain-bandwidth product of the typical CMOS self-bias differential amplifier. With 1.8V $0.8{\mu}m$ CMOS process parameter, the results of HSPICE show that the designed parallel CMOS self-bias differential amplifier has a dc gain and a gain-bandwidth product of 64 dB and 49 MHz respectively.