• Korean Journal of Computational Design and Engineering
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• v.11 no.2
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• pp.97-106
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• 2006

Voronoi diagrams have been known for numerous important applications in science and engineering including CAD/CAM. Especially, the Voronoi diagram for 3D spheres has been known as very useful tool to analyze spatial structural properties of molecules or materials modeled by a set of spherical atoms. In this paper, we present two algorithms, the edge-tracing algorithm and the region-expansion algorithm, for constructing the Voronoi diagram of 3D spheres and applications to protein structure analysis. The basic scheme of the edge-tracing algorithm is to follow Voronoi edges until the construction is completed in O(mn) time in the worst-case, where m and n are the numbers of edges and spheres, respectively. On the other hand, the region-expansion algorithm constructs the desired Voronoi diagram by expanding Voronoi regions for one sphere after another via a series of topology operations, starting from the ordinary Voronoi diagram for the centers of spheres. It turns out that the region-expansion algorithm also has the worst-case time complexity of O(mn). The Voronoi diagram for 3D spheres can play key roles in various analyses of protein structures such as the pocket recognition, molecular surface construction, and protein-protein interaction interface construction.

• The KIPS Transactions:PartD
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• v.16D no.4
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• pp.527-540
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• 2009

State diagrams describe the dynamic behavior of an individual object as a number of states and transitions between these states. In this paper, we propose an automated technique to the generation of a state diagram from class operations with pre/post conditions. And I also develop a supporting tool, SDAG (State Diagram Automatic Generation tool). Additionally, we propose a complexity metric and a state diagram generation approach concerning types of each operation for decreasing complexity of generated state diagram.

• The KIPS Transactions:PartD
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• v.12D no.3 s.99
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• pp.447-454
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• 2005

Generally, Diagram Systems related XML document are designed for certain purpose. It is also difficult to create DML document, because there is no definition of diagram component. In this paper, we design and implement the diagram system to execute the XML document. This diagram system defines the diagram component with WYSIWIG concept ,md it is designed to generate DML document automatically. Therefore, it is possible to develop diagram efficiently and maintain consistency by definition of syntax about diagram with DTD. And this system uses the concept of VPL(Visual Programming Language) to check syntax and semantic about diagram sentence. Though this system, DML documents can be generated easily, and it can also check syntax and perform semantic.

• The KIPS Transactions:PartD
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• v.17D no.4
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• pp.283-296
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• 2010

Timing diagram is a useful tool for describing the specification of system, but there is no study for test case strategy of a timing diagram. To solve this problem, we followed the steps to generate test cases from timing diagram in this paper. 1) We defined a timing diagram formally. 2) We describe the method of transforming from a timing diagram model into a Stateflow model which has an equivalent relationship between a timing diagram model and a transformed Stateflow model. 3) We generated test cases from a transformed Stateflow model using SDV which is plugged in Simulink. To show that our approach is useful, we made an experiment with a surveillance model and arbitrary timing diagram models. In the experiment we transformed timing diagram models into Stateflow models, generated test cases from transformed Stateflow models using SDV, and analyzed the generation results. The conclusion that can be obtained from this study is that timing diagram is not only a specification tool but also a useful tool when users are trying to generate test cases based on model.

• Journal of the Korean Geographical Society
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• v.17
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• pp.1-10
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• 1978

• International Journal of Control, Automation, and Systems
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• v.3 no.1
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• pp.56-69
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• 2005

In this paper, it is clearly shown that the two well-known necessary and sufficient conditions mp n as generic static output feedback pole-assignment and mp + d(m+p) n+d as generic minimum d-th order dynamic output feedback pole-assignment on complex field, unbelievably, do not match up each other in strictly proper linear systems. For the analysis, a diagram analysis is newly created (which is defined by the analysis of 'convoluted rectangular/dot diagrams' constructed via node-branch conversion of the signal flow graphs of output feedback gain loops). Under this diagram analysis, it is proved that the minimum d-th order dynamic output feedback compensator for pole-assignment in m-input, p-output, n-th order systems is quantitatively decomposed into static output feedback compensator and its associated d number of arbitrary 1st order dynamic elements in augmented (m+d)-input, (p+d)-output, (n+d)-th order systems. Total configuration of the mismatched data is presented in a Table.

• Proceedings of the Korean Society for Technology of Plasticity Conference
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• 2005.10a
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• pp.243-246
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• 2005

A tube hydroformability testing system was designed and manufactured to observe the forming steps and to provide arbitrary combination of internal pressure and axial feed. The forming limit diagram of an aluminum tube was obtained from the free bulge test and the T-shape forming test using this system, giving the criteria for predicting failure in the hydroforming process. The hydroformability of aluminum tube according to different conditions of a prebending process was discussed, based on the finite element analysis and the forming limit test. The effects of 2D and 3D prebending on the tube hydroforming process of an automotive failing arm were evaluated and compared with each other.

• The KIPS Transactions:PartD
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• v.17D no.5
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• pp.337-346
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• 2010

Timing diagram is popularly utilized for the reason of its advantages; it is convenient for timing diagram to describe behavior of system and it is simple for described behaviors to recognize it. Various techniques are needed to test systems described in timing diagram. One of them is a technique to derive the system into a certain condition under which a test case is effective. This paper proposes a technique to automatically generate the test input sequence to reach the condition for systems described in timing diagram. It requires a proper input set which satisfy transition condition restricted by input waveform and timing constraints to generate a test input sequence automatically. To solve the problem, this paper chooses an approach utilizing the linear programming, and solving procedure is as follows: 1) Get a Timing diagram model as an input, and transforms the timing diagram model into a linear programming problem. 2) Solve the linear programming problem using a linear programming tool. 3) Generate test input sequences of a timing diagram model from the solution of linear programming problem. This paper addresses the formal method to drive the linear programming model from a given timing diagram, shows the feasibility of our approach by prove it, and demonstrates the usability of our paper by showing that our implemented tool solves an example of a timing diagram model.

• Journal of the Korean Institute of Intelligent Systems
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• v.9 no.5
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• pp.490-495
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• 1999

In this paper. a learning method VoD-EBP for neural networks is proposed, which learn patterns by error back propagation. Based on Voronoi diagram, the method initializes the weights of the neural networks systematically, wh~ch results in faster learning speed and alleviated local optimum problem. The method also shows better the reliability of the design of neural network because proper number of hidden nodes are determined from the analysis of Voronoi diagram. For testing the performance, this paper shows the results of solving the XOR problem and the parity problem. The results were showed faster learning speed than ordinary error back propagation algorithm. In solving the problem, local optimum problems have not been observed.

• Korean Journal of Computational Design and Engineering
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• v.14 no.5
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• pp.306-313
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• 2009

This paper presents the unique formation process of a volumetric space with the digital algorithm developed for Voronoi diagram in order to generate an effective parametric architectural form. By applying systematic parameters of architectural conditions within digital parametric tools, the interactions among sub-spaces developed by Voronoi diagram are enhanced by manipulating the spatial structures. In this paper, we discuss how the parametric distributing and zoning geometrical system can support designers in developing a free-formed space, and research on how this system creates a 3D volumetric space. With the in-depth research on the system and structure of Voronoi diagram, the approaches to the application of Voronoi diagram into architectural form generation are clarified to be an effective, creative and successful digital tool. The result of the application of the Voronoi diagram improves the design quality with systematic language in the sense that the sub-regions are created and controlled under the systematic and balanced hierarchy having dynamic relationships among each others with the restoration of the equilibrium of forces and tensions. This 3-dimensional Voronoi diagram provides another means for designers to solve architectural issues and to reinforce their design concepts.