• Title/Summary/Keyword: Current-Mode Circuit

Search Result 642, Processing Time 0.028 seconds

A Bidirectional Hybrid Switching Full-Bridge Converter with Active Clamp Circuit for V2G Applications (V2G 응용을 위한 능동클램프 회로를 가진 양방향 하이브리드 스위칭 풀브리지 컨버터)

  • Vuand, Hai-Nam;Choi, Woojin
    • Proceedings of the KIPE Conference
    • /
    • 2016.07a
    • /
    • pp.335-336
    • /
    • 2016
  • This paper introduces a bidirectional full-bridge converter with new active damp structure. The proposed active damp circuit can damp the oscillating voltage across the rectifier diodes with a smaller voltage stress of the damping capacitor and eliminate the circulating current. In addition, the proposed converter can achieve additional advantages such as nearly ZCS switching for leading-leg switches and no recovery current for rectifier-bridge by the suitable design of the damp capacitor to resonate with leakage inductor. Since the ZVS is achieved for both leading-leg and lagging-leg switches by the magnetizing current of the transformer, it can be achieved regardless of the load variation. A 3.3 kW prototype converter is implemented for vehicle-to-grid (V2G) application and the advantages of the proposed converter are verified by the experiments. The maximum efficiencies of 98.2% and 97.6% have been achieved for the buck mode and boost mode operation, respectively.

  • PDF

Experimental Assessment with Wind Turbine Emulator of Variable-Speed Wind Power Generation System using Boost Chopper Circuit of Permanent Magnet Synchronous Generator

  • Tammaruckwattana, Sirichai;Ohyama, Kazuhiro;Yue, Chenxin
    • Journal of Power Electronics
    • /
    • v.15 no.1
    • /
    • pp.246-255
    • /
    • 2015
  • This paper presents experimental results and its assessment of a variable-speed wind power generation system (VSWPGS) using permanent magnet synchronous generator (PMSG) and boost chopper circuit (BCC). Experimental results are obtained by a test bench with a wind turbine emulator (WTE). WTE reproduces the behaviors of a windmill by using servo motor drives. The mechanical torque references to drive the servo motor are calculated from the windmill wing profile, wind velocity, and windmill rotational speed. VSWPGS using PMSG and BCC has three speed control modes for the level of wind velocity to control the rotational speed of the wind turbine. The control mode for low wind velocity regulates an armature current of generator with BCC. The control mode for middle wind velocity regulates a DC link voltage with a vector-controlled inverter. The control mode for high wind velocity regulates a pitch angle of the wind turbine with a pitch angle control system. The hybrid of three control modes extends the variable-speed range. BCC simplifies the maintenance of VSWPGS while improving reliability. In addition, VSWPGS using PMSG and BCC saves cost compared with VSWPGS using a PWM converter.

High-speed CMOS Frequency Divider with Inductive Peaking Technique

  • Park, Jung-Woong;Ahn, Se-Hyuk;Jeong, Hye-Im;Kim, Nam-Soo
    • Transactions on Electrical and Electronic Materials
    • /
    • v.15 no.6
    • /
    • pp.309-314
    • /
    • 2014
  • This work proposes an integrated high frequency divider with an inductive peaking technique implemented in a current mode logic (CML) frequency divider. The proposed divider is composed with a master-slave flip-flop, and the master-slave flip-flop acts as a latch and read circuits which have the differential pair and cross-coupled n-MOSFETs. The cascode bias is applied in an inductive peaking circuit as a current source and the cascode bias is used for its high current driving capability and stable frequency response. The proposed divider is designed with $0.18-{\mu}m$ CMOS process, and the simulation used to evaluate the divider is performed with phase-locked loop (PLL) circuit as a feedback circuit. A divide-by-two operation is properly performed at a high frequency of 20 GHz. In the output frequency spectrum of the PLL, a peak frequency of 2 GHz is obtained witha divide-by-eight circuit at an input frequency of 250 MHz. The reference spur is obtained at -64 dBc and the power consumption is 13 mW.

Magnetic circuit optimization in designing Magnetorheological damper

  • Yazid, Izyan I.M.;Mazlan, Saiful A.;Kikuchi, Takehito;Zamzuri, Hairi;Imaduddin, Fitrian
    • Smart Structures and Systems
    • /
    • v.14 no.5
    • /
    • pp.869-881
    • /
    • 2014
  • This paper presents the materials analysis for combination of working modes of Magnetorheological (MR) damper. The materials were selected based on the optimum magnetic field strength at the effective areas in order to obtain a better design of MR damper. The design of electromagnetic circuit is one of the critical criteria in designing MR dampers besides the working mechanism and the types of MR damper. The increase in the magnetic field strength is an indication of the improvement in the damping performance of the MR damper. Eventually, the experimental test was performed under quasi-static loading to observe the performances of MR damper in shear mode, squeeze mode and mixed mode. The results showed that the increment of forces was obtained with the increased current due to higher magnetic flux density generated by electromagnetic coils. In general, it can be summarized that the combination of modes generates higher forces than single mode for the same experimental parameters throughout the study.

Single-Phase Improved Auxiliary Resonant Snubber Inverter that Reduces the Auxiliary Current and THD

  • Zhang, Hailin;Kou, Baoquan;Zhang, He;Zhang, Lu
    • Journal of Power Electronics
    • /
    • v.16 no.6
    • /
    • pp.1991-2004
    • /
    • 2016
  • An LC filter is required to reduce the output current ripple in the auxiliary resonant snubber inverter (ARSI) for high-performance applications. However, if the traditional control method is used in the ARSI with LC filter, then unnecessary current flows in the auxiliary circuit. In addressing this problem, a novel load-adaptive control that fully uses the filter inductor current ripple to realize the soft-switching of the main switches is proposed. Compared with the traditional control implemented in the ARSI with LC filter, the proposed control can reduce the required auxiliary current, contributing to higher efficiency and DC-link voltage utilization. In this study, the detailed circuit operation in the light load mode (LLM) and the heavy load mode (HLM) considering the inductor current ripple is described. The characteristics of the improved ARSI are expressed mathematically. A prototype with 200 kHz switching frequency, 80 V DC voltage, and 8 A maximum output current was developed to verify the effectiveness of the improved ARSI. The proposed ARSI was found to successfully operate in the LLM and HLM, achieving zero-voltage switching (ZVS) of the main switches and zero-current switching (ZCS) of the auxiliary switches from zero load to full load. The DC-link voltage utilization of the proposed control is 0.758, which is 0.022 higher than that of the traditional control. The peak efficiency is 91.75% at 8 A output current for the proposed control, higher than 89.73% for the traditional control. Meanwhile, the carrier harmonics is reduced from -44 dB to -66 dB through the addition of the LC filter.

Low power-high performance embedded SRAM circuit techniques with enhanced array ground potential (어레이 접지전압 조정에 의한 저전력, 고성능 내장형 SRAM 회로 기술)

  • 정경아;손일헌
    • Journal of the Korean Institute of Telematics and Electronics C
    • /
    • v.35C no.2
    • /
    • pp.36-47
    • /
    • 1998
  • Low power circuit techniques have been developed to realize the highest possible performance of embedded SRAM at 1V power supply with$0.5\mu\textrm{m}$ single threshold CMOS technology in which the unbalance between NMOS and PMOS threshold voltages is utilized to optimize the low power CMOS IC design. To achieve the best trade-off between the transistor drivability and the subthreshold current increase, the ground potential of memory array is raised to suppressthe subthreshold current. The problems of lower cellstability and bit-line dealy increase due to the enhanced array ground potential are evaluated to be controlled within the allowable range by careful circuit design. 160MHz, 128kb embedded SRAM with 3.4ns access time is demonstrated with the power consumption of 14.8mW in active $21.4{mu}W$ in standby mode at 1V power supply.

  • PDF

Effect of Ca on Droplet Transfer Phenomena in GMA Welding (GMAW 용적이행 현상에 미치는 Ca의 영향)

  • 안영호;방국수;이종봉;장내웅
    • Journal of Welding and Joining
    • /
    • v.12 no.4
    • /
    • pp.76-84
    • /
    • 1994
  • Droplet transfer modes due to welding conditions and the effect of Ca in welding wire on droplet transfer were investigated. Droplet transfer mode in CO$_{2}$ welding was classified into 2 modes, that is, short circuit and globular transfer, with increasing welding current and voltage. With increasing Ca content in wire, repulsive pressure due to vaporization of Ca was considerably increased. In short circuit transfer region, arcing time was increased and droplet transfer cycle was decreased, with increasing Ca content. In globular transfer region, welding condition for globular transfer was lower current region, with increasing Ca content.

  • PDF

A Study on the ESD Effect and Measurement for PCB (PCB 선로의 ESD 영향 및 측정법에 관한 연구)

  • Lee, Kwan-Hun;Hwang, Soon-Mi;Song, Byoung-Suk
    • Journal of Applied Reliability
    • /
    • v.11 no.3
    • /
    • pp.245-249
    • /
    • 2011
  • Through the test of ESD(Electro Static Discharge) for PCB circuit, we are able to research on the ESD effect. This paper also studys on the ESD test method for measurement. In the measurement of the discharge current, we used current probe(TC-1). The applied voltage to the PCB metal is -3 kV HBM mode. In conclusion ESD influences exponentially greater impact in nearer PCB circuit.

Voltage-fed high frequency resonent inverter of instantaneous current phaser control method (순시 전류 phaser 제어방식의 전압형 고주파 공진 인버터)

  • LEE K.H.;RO C.K.;KIM D.H.;LEE B.S.;PARK J.K.;JUNG B.Y.
    • Proceedings of the KIPE Conference
    • /
    • 2001.07a
    • /
    • pp.348-351
    • /
    • 2001
  • In this paper, voltage-fed high frequency resonant inverter of instantaneous current phaser control method used to DC voltage source separated is proposed. In the output control method, a novel circuit type of phase shift driving signal method with CVCF illustrated, also the operation principle of the proposed circuit is described in detail and its characteristics are presented as to normalized parameters. According to the each mode, in order to the circuit analysis and characteristic evaluation of the state equation are derives and present used to normalized parameter. In the future, this proposed inverter show that it can be practically used as power source system for the lighting equipment of discharge lamp, DC-DC converter etc.

  • PDF

An 8b Two-stage Folding A/D Converter with Low DNL (낮은 DNL 특성을 가진 8b 2단 Folding A/D 변환기)

  • Cui, Zhi-Yuan;Cuong, Do-Danh;Yeom, Chang-Yoon;Lee, Hyung-Gyoo;Kim, Kyoung-Won;Kim, Nam-Soo
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
    • /
    • v.21 no.5
    • /
    • pp.421-425
    • /
    • 2008
  • In this research, a 8-bit CMOS 2 stage folding A/D converter is designed, For low power consumption and small chip size, the A/D converter is designed by using folding and interpolation circuit. Folding circuit is composed of the transistor differential pairs which are connected in parallel. It reduces the number of comparator drastically. The analog block composed of folding block, current interpolation circuit, and three stage current comparator is designed with differential-mode for high speed operation. The simulation in a $0.35\;{\mu}m$ CMOS process. shows DNL and SNDR of 0.5LSB and 47 dB at 250 MHz/s sampling frequency.