• Proceedings of the KIEE Conference
• /
• 2008.07a
• /
• pp.942-943
• /
• 2008

The boost converter is usually used in power factor correction. The dynamic losses of its output diode are produced during the reverse recovery time. The power efficiency is decreased due to the losses and also it generates the noise. These disadvantages have been remarkably improved by ZCS and ZVS techniques of power factor improvement circuit. Some benefits lead to the achievement of higher power density and the development cost can be decreased. In this paper work, the reverse recovery suppression(RS) PFC method is used. A inductor and a diode are added into the conventional circuit. The switching device, MOSFET is turned off after the reverse recovery current has come to the zero level. The Zero Current Switching(ZCS) is implemented at that time. This power conversion technique improves the efficiency to about 1% and reduces the noise obviously. And the additional inductor can be designed using an original filter core in the circuit. The converter size is reduced effectively.

• Journal of Korea Society of Industrial Information Systems
• /
• v.21 no.4
• /
• pp.21-30
• /
• 2016

In a single-phase power factor correction (PFC), the standard cascaded control algorithm using a proportional-integral-derivative (PID) controller has two main drawbacks: an inability to track sinusoidal current reference and low harmonic compensation capability. These drawbacks cause poor power factor and high harmonics in grid current. To improve these drawbacks, this paper uses a proportional-integral-derivative-resonant (PIDR) controller which combines a type-III PID with proportional-resonant (PR) controllers in the PFC. Based on a small signal model of the PFC, the type-III PID controller was implemented taking into account the bandwidth and phase margin of the PFC system. To adopt the PR controllers, the spectrum of inductor current of the PFC was analyzed in frequency domain. The hybrid PIDR controller were simulated using PSCAD/EMTDC and implemented on a 3 kW PFC prototype hardware. The performance results of the hybrid PIDR controller were compared with those of an individual type-III PID controller. Both controllers were implemented successfully in the single-phase PFC. The total harmonic distortion of the proposed controller were much better than those of the individual type-III PID controller.

• Proceedings of the KIEE Conference
• /
• 1996.07a
• /
• pp.259-261
• /
• 1996

In this paper, active input filter for power factor correction(PFC) circuit employing ripple arrent and voltage cancellation is proposed to reduce filter's size and cost, and to make filter design easy. Switching ripple current and voltage can be sensed through the secondary windings of filter inductor. Single stage passive filter can achieve high order filter characteristics by using active ripple current and voltage cancellation technique. Conventional high order passive filter and its problems are suggested. Analysis of active filter and design procedure are detailed. Simulation result is presented to verify high order filter characteristics of proposed scheme.

• Journal of Advanced Marine Engineering and Technology
• /
• v.22 no.5
• /
• pp.617-625
• /
• 1998

A passive energy recovery snubber for high-power-factor boost rectifier, in which the main switch is implemented with a MOSFET, is described in terms of the equivalent circuits that are operational during turn-on and turn-off sequences. These equivalent circuits are analyzed so that the overshoot voltage across the main switch, the snubber current, and the turn-off transition time can be predicted analytically. From these results, the normalized overshoot voltage is reduced to 1 as $_W2T_on$ varies from zero to $\pi$/2, and then it is fIxed at 1 for $_W2T_on$> $\pi$/2. The peak snubber inductor current is directly proportional to the input current. The turn-offtransition time wltoffvaries from 0 to 2.57, depending on $_W2T_on$. The main switch combined with proposed snubber can be turned on with zero current and turned off at limited voltage stress. The high-power-factor boost rectifier with proposed snubber is implemented, and the experimental results are presented to confirm the validity of proposed snubber.

• Proceedings of the KIEE Conference
• /
• 2002.04a
• /
• pp.112-115
• /
• 2002

Previous AC/DC PFC Boost Converter perceives feed forward signal of input and feedback signal of output for average current-mode control. Previous Boost Converter, the quantity of input current will be decreased by the decrease of output current in light load, and also power factor comes to be decreased. Also the efficiency of converter will be decreased by the decrease of power factor. The proposed converter presents the good PFC(Power Factor Correction), low line current hormonic distortions and tight output voltage regulations using non-dissipative snubber. The proposed converter also has a high efficiency by non-dissipative snubber circuit. To show the superiority of this converter is verified through the experiment with a 640W, 100kHz prototype converter.

• Nuclear Engineering and Technology
• /
• v.49 no.8
• /
• pp.1600-1609
• /
• 2017

The accelerator-driven subcritical system (ADS) is driven by a neutron source from spallation reactions introduced by the injected proton beam. Part of the neutron source has energy as high as a few hundred MeV to a few GeV. The effects of high-energy source neutrons ($E_n$ > 20 MeV) are usually approximated by energy cut-off treatment in practical core calculations, which can overestimate the predicted proton beam current in the ADS design. This article intends to quantize this effect and propose a way to solve this problem. To evaluate the effects of high-energy neutrons in the subcritical core, two models are established aiming to cover the features of current experimental facilities and industrial-scale ADS in the future. The results show that high-energy neutrons with $E_n$ > 20 MeV are of small fraction (2.6%) in the neutron source, but their contribution to the source efficiency is about 23% for the large scale ADS. Based on this, a neutron source efficiency correction factor is proposed. Tests show that the new correction method works well in the ADS calculation. This method can effectively improve the accuracy of the prediction of the proton beam current.

• The Transactions of the Korean Institute of Electrical Engineers P
• /
• v.62 no.3
• /
• pp.145-150
• /
• 2013

A novel AC to DC PWM converters with unity input power factor are proposed to overcome the above shortcoming. The main function of these converters is to shape the input line current to force it exactly in phase with the input AC voltage. Therefore, the input power factor can be improved to near unity and the input current harmonics can be eliminated. In this paper, half-bridge converter with two active switches and two diodes are utilized for low-cost type UPS configuration. By having only two semiconductors in the current path at any time, losses can be reduced over the conventional boost topology. Also, this converter provides controllable dc-link voltage, high power factor, and low cost type converter by simple power circuits. Simulation results show that the proposed half-bridge converter/inverter control technique can be applied to single-phase low-cost type UPS systems successfully.

• The Transactions of the Korean Institute of Power Electronics
• /
• v.10 no.3
• /
• pp.211-218
• /
• 2005

Switched Reluctance Motor(SRM) offers the advantages of simple and robust motor construction, high speed and high efficiency over a wide operating range of torque and speed, excellent controllability. However SRM has the disadvantages of high current harmonics, and low power factor because the required output of speed and torque is produced by the discontinuous and loss of power system, and brings about the incorrect operation of electronic system. This paper deals with an energy efficient converter fed SRM system with the reduced harmonics and improved power factor. The validity of the proposed scheme is verified via experiments. We are implemented the proposed control system using 80C196KC micro-controller.

• Proceedings of the KIPE Conference
• /
• 2000.07a
• /
• pp.150-154
• /
• 2000

This paper proposes PFC boost converter with soft switching for harmonics decrement and analyzes characteristics of PFC boost converter. In this technique power factor correction(PFC) is usually obtained by operating the PFC stage in the discontinuous current mode(DCM) Switching devices are operated for reducing current stress and electronical noise. As a result eliminate 3rd harmonic component and high power factor(PF) of the input line are verified by characteristics analysis and experimental results.

• Proceedings of the KIPE Conference
• /
• 1999.07a
• /
• pp.266-269
• /
• 1999

Several power factor correction(PFC) circuits are presented to achieve high PF electronic ballast for both voltage-fed and current-fed electronic ballast. The proposed PFC circuits use valley-fill(VF) type DC-link stages modified from the conventional VF circuit to adopt the charge pumping method for PFC operations during the valley intervals. In voltage-fed ballast, charge pump capacitors are connected with the resonant capacitors. In current-fed type, the charge pump capacitors are connected with the additional secondary-side of the power transformer. The measured PF and THD are higher than 0.99 and 15% for all proposed PFC circuits. The lamp current CF is also acceptable in the proposed circuits. The proposed circuit is suitable for implementing cost-effective electronic ballast.