• The Transactions of the Korean Institute of Electrical Engineers P
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• v.57 no.1
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• pp.6-13
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• 2008

National standard system for calibrating current transformer(CT) up to primary current of 20,000A have been established. The system consists of 20,000 A AC high current source, CT comparator, standard CT, CT under test and CT burden. An AC high current is applied tn the primary windings of both the standard CT and the CT under test, and then the CT comparator measures the ratio error and the phase displacement by comparing the secondary currents of the two transformers. As a validity check for 20,000 A CT calibration system, the comparison with the two national standard institutes(NMIs) has been performed using same CTs. The comparison results of the CTs are consistent with those measured at two NMIs within 0.004 % for ratio error and 0.1 min for phase displacement in the primary current ranges of Ip = 10 - 20,000 A with a secondary current of Is = 5 A.

• Korean Journal of Metals and Materials
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• v.50 no.2
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• pp.152-158
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• 2012

The effect of current waveform on Cu filling into TSV (through-silicon via) and the bottom-up ratio of Cu were investigated for three dimensional (3D) Si chip stacking. The TSV was prepared on an Si wafer by DRIE (deep reactive ion etching); and its diameter and depth were 30 and $60{\mu}m$, respectively. $SiO_2$, Ti and Au layers were coated as functional layers on the via wall. The current waveform was varied like a pulse, PPR (periodic pulse reverse) and 3-step PPR. As experimental results, the bottom-up ratio by the pulsed current decreased with increasing current density, and showed a value of 0.38 on average. The bottom-up ratio by the PPR current showed a value of 1.4 at a current density of $-5.85mA/cm^2$, and a value of 0.91 on average. The bottom-up ratio by the 3-step PPR current increased from 1.73 to 5.88 with time. The Cu filling by the 3-step PPR demonstrated a typical bottom-up filling, and gave a sound filling in a short time.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.60 no.4
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• pp.892-898
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• 2011

In DC electric railways, while an electric rail car is driving, a part of the working current returned to the substation through rails leaks into the ground. Such a stray current causes railway facilities and metal objects to corrode electrolytically. Therefore, change of stray current needs to be monitored constantly. But so far in domestic, the research on stray current measuring techniques and system adaption are insufficient. To estimate stray current, this paper addresses a method of monitoring the return current that is returned into the negative pole of the substation in real time.

• Journal of Welding and Joining
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• v.23 no.1
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• pp.41-47
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• 2005

Arc pressure is one of important factors in understanding physical arc phenomena. Especially it affects on the penetration, size and shape of TIG welding. Some researches were reported on the effect of arc pressure in low and middle current region. But there are not any research in high current region. The purpose of this study is to investigate the arc pressure distribution with mixing ratio of shield gas such as Ar and He gases. A Cu block with water cooling was specifically designed and used as an anode electrode in order to measure the arc pressure in high current region. Then, the arc pressure distribution was measured with change in welding current and mixing ratio of shield gases. The arc force was obtained by numerically integrating the measured results. As the results, it was shown that the arc pressure was concentrated at the central part of the arc in middle and high current regions when a pure Ar gas was used. In case of Ar + He mixing gas, the arc pressure was much lower than that of pure Ar gas. In addition, it was widely distributed to radial direction.

• Transactions on Electrical and Electronic Materials
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• v.17 no.5
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• pp.302-305
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• 2016

In this paper, a low on-resistance and high current driving capability trench gate power metal-oxide-semiconductor field-effect transistor (MOSFET) incorporating a current sensing feature is proposed and evaluated. In order to realize higher cell density, higher current driving capability, cost-effective production, and higher reliability, self-aligned trench etching and hydrogen annealing techniques are developed. While maintaining low threshold voltage and simultaneously improving gate oxide integrity, the double-layer gate oxide technology was adapted. The trench gate power MOSFET was designed with a 0.6 μm trench width and 3.0 μm cell pitch. The evaluated on-resistance and breakdown voltage of the device were less than 24 mΩ and 105 V, respectively. The measured sensing ratio was approximately 70:1. Sensing ratio variations depending on the gate applied voltage of 4 V ~ 10 V were less than 5.6%.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.32A no.7
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• pp.51-57
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• 1995

The theoretical analysis for AlInAs/GaInAs resonant tunneling diodes (RTDs), which have shown the improved negative differential resistance (NDR) characteristics, has scarcely been made in comparison with AlGaAS/GaAs RTDs. In this paper, the static current-voltage relation of Al$_{0.48}In_{0.52}As/Ga_{0.47}In_{0.53}$As RTDs were numerically estimated by using a self-consistent method. Assuming a simplified RTD with single quantum well structure and spacer layers, the peak current density (J$_{P}$) and the peak-to-valley current ratio (PVCR) were analysed as the function of the thickness of the well, the barrier and the spacer layer, and temperature. As the results, the peak current density and the peak-to-valley current ratio indicated a reciprocal relation roughly in respect to the thicknesses of the well and the barrier, and it was theoretically predicted that it be not attainable to provide a high peak current desity (J$_{P}$) over 1${\times}10^{5}A/cm^{2}$ as well as the large peak-to-valley current ratio (PVCR) over 10 that were the the critical conditions for the practical use.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.19 no.7
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• pp.1617-1622
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• 2015

This paper analyzes the ratio of tunneling current for channel doping concentration of sub-10 nm asymmetric double gate(DG) MOSFET. The ratio of tunneling current for off current in subthreshold region increases in the region of channel length of 10 nm below. Even though asymmetric DGMOSFET is developed to reduce short channel effects, the increase of tunneling current in sub-10 nm is inevitable. As the ratio of tunneling current in off current according to channel doping concentration is calculated in this study, the influence of tunneling current to occur in short channel is investigated. To obtain off current to consist of thermionic emission and tunneling current, the analytical potential distribution is obtained using Poisson equation and tunneling current using WKB(Wentzel-Kramers-Brillouin). As a result, tunneling current is greatly changed for channel doping concentration in sub-10 nm asymmetric DGMOSFET, specially with parameters of channel length, channel thickness, and top/bottom gate oxide thickness and voltage.

• Culinary science and hospitality research
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• v.14 no.4
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• pp.93-105
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• 2008

This study was attempted to analyze causal relations among flexibility, growth, and profitability variables, which are the financial indexes of restaurant enterprises. The samples were 24 restaurant enterprises in total, and 102 financial statements between 2002 and 2006 were analyzed. As a result of the analysis, total asset growth rate influenced all profitability variables among growth variables. Also, the net sales growth influenced return on sales and return on assets, and the assets turnover influenced return on assets and return on equity. Among flexibility variables, current ratio and interest coverage ratio to operating profit influenced return on assets, and return on equity was influenced by current ratio and debt-to-equity ratio.

• Proceedings of the KIEE Conference
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• 2003.07a
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• pp.418-420
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• 2003

The fault current limiting characteristics at the initial fault time for flux-lock type high-Tc superconducting fault current limiter(SFCL) were investigated. The amplitude of initial fault current of the flux-lock type SFCL was dependent on the inductance ratio of coil 1 and 2. After fault current limiting mode was analyzed, we compared the calculated value with the experimental one for the initial fault current. The effect of initial fault current due to the inductance ratio of coil 1 and 2 on fault current limiting characteristics was discussed.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.23 no.2
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• pp.164-168
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• 2010

The transformer is expected to be an essential component of a superconducting fault current limiter (SFCL) for both the increase of its voltage ratings and the simultaneous quench due to different critical current between high-$T_C$ superconducting (HTSC) elements comprising the SFCL. However, in order to perform the effective current limiting operation of the SFCL, the design for the SFCL considering the hysteresis characteristics of the iron core is required. In this paper, the influence of the hysteresis characteristics of the iron core comprising the transformer type SFCL on its current limiting characteristics was investigated. Through the comparative analysis on the hysteresis curves due to the ratio of the turn number between the 1st and the 2nd windings of the transformer, the proper design condition for the ratio of the turn number to achieve the effective current limiting operation of the transformer type SFCL could be obtained.