• 전력전자학회논문지
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• 제23권2호
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• pp.147-151
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• 2018

Phase-shift fullbridge (PSFB) converter detects the current in the primary side for operation of the peak current mode controller (PCMC). The PCMC must used the slope compensation to solve the problem when the effective duty is over 0.5. The voltage response of PSFB converters has slower than that of buck converter because of slew interval even if the voltage controllers of two converters have same bandwidth. To overcome these problems, this work proposes a compensating method of current reference considering slew interval and fast response in the PSFB converter. The effectiveness of the proposed method is proven using the PSIM simulation and experiment.

• 전력전자학회논문지
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• 제27권5호
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• pp.402-409
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• 2022

In vector-controlled drive systems, the current measurement offset error causes unwanted torque ripple, resulting in speed and torque control performance degradation. The current measurement offset error is caused by various factors, including thermal drift. This study proposes a simple DC offset error compensation method for a surface permanent magnet motor based on a disturbance observer. The disturbance observer is designed in the stationary reference frame. The proposed method uses only the measured current and machine parameters without additional hardware. The effect of parameter variations is analyzed, and the performance of the current measurement offset error compensation method is validated using simulation and experimental results.

• Journal of Electrical Engineering and Technology
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• 제10권1호
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• pp.30-40
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• 2015

For a shunt power quality controller (SPQC) the DC side voltage value which is closely related to the compensation performance is a significant parameter. Buy so far, very little discussion has been conducted on this in a quantitative manner by previous publications. In this paper, a method to design the DC side voltage of SPQC is presented according to the compensation performance in the single-phase system and the three-phase system respectively. First, for the reactive current and the harmonic current compensation, a required minimal value of the DC side voltage with a zero total harmonic distortion (THD) of the source current and a unit power factor is obtained for a typical load, through the equivalent circuit analysis and the Fourier Transform analytical expressions. Second, when the DC side voltage of SPQC is lower than the above-obtained minimal value, the quantitative relationship between the DC side voltage and the THD after compensation is also elaborated using the curve diagram. Hardware experimental results verify the design method.

• 전력전자학회논문지
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• 제11권2호
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• pp.172-183
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• 2006

본 논문은 Akagi에 의해 발표된 p-q 이론과 Nabae 및 Peng에 의하여 발표된 크로스벡터 이론의 대비를 통하여 3상 4선 계통에서 순시전력보상방법을 분석한다. 3상 3선 계통에서 영상성분 전압이 없는 경우 두 이론은 똑같다. 그렇지만 3상 4선 계통에서 영상성분 전압과 전류가 포함되는 경우, 두 이론은 순시무효전력과 순시유효전력을 달리 정의한다. 본 논문에서는 이론적 분석과 컴퓨터 시뮬레이션을 바탕으로 영상성분 전압과 영상성분 전류가 존재하는 3상 4선 계통에서 에너지 저장요소의 필요 없이 무효전력만의 보상을 통하여 계통의 중성선 전류를 완벽히 제거할 수 있는 순시전력보상방법을 제시한다.

• 소성∙가공
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• 제25권2호
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• pp.109-115
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• 2016

In the current study, automatic tool compensation is accomplished by using a finite element stamping analysis for a center roof rail made of UHSS in order to satisfy the specifications for shape accuracy. The initial blank shape is calculated from a finite element inverse analysis and potential forming defects such as tearing and wrinkling are determined by the finite element stamping analysis based on the initial tool shape. The blank shape is optimized to meet the shape requirements of the final product with the stamping analysis, and die compensation is determined with the information about springback. The specifications for shape accuracy were successfully achieved by the proposed die compensation scheme using the finite element stamping analysis. The current study demonstrates that the compensation tendency is similar when the proposed scheme is used or when the compensation is performed by trial and error in the press-shop. This similarity verifies that the automatic compensation scheme can be used effectively in the first stage of tool design especially for components made from UHSS.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2003년도 춘계전력전자학술대회 논문집(2)
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• pp.575-578
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• 2003

This paper presents a new current control method to reduce torque ripple of Brushless DC Motor during commutation. In the proposed control strategy, the current slopes of rising and decaying phase during commutation is equalized by the compensation voltage. By adding the compensation voltage for it to the current controller output, the reduced torque ripple can be obtained. The simulation and experimental results show that the proposed method reduces the torque and the current ripples significantly.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1989년도 추계학술대회 논문집 학회본부
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• pp.310-312
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• 1989

From the viewpoint of an effective energy use, many method for reactive power compensation has been developed. Among of the reactive power compensation, this paper describes the relation of operation interpretation, filter, hysteresis width and switching time of current controlled PWM converter which has excellent reactive power compensation. This current controlled PWM convertor is excellent the view of reactive power compensation by current control method using hysteresis comparator method, but is required element of high response characteristics. Therefore this paper offers the series of data for system considering switching characteristics of switching element.

• JSTS:Journal of Semiconductor Technology and Science
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• 제7권4호
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• pp.241-246
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• 2007

This paper presents two novel compensation circuits for leakage current and power supply noise (PSN) in phase locked loop (PLL) using a nanometer CMOS technology. The leakage compensation circuit reduces the leakage current of the charge pump circuit and the PSN compensation circuit decreases the effect of power supply variation on the output frequency of VCO. The PLL design is based on a 32nm predictive CMOS technology and uses a 0.9 V power supply voltage. The simulation results show that the proposed PLL achieves 88% jitter reduction at 440 MHz output frequency compared to the PLL without leakage compensator and its output frequency drift is little to 20% power supply voltage variations. The PLL has an output frequency range of 40 $M{\sim}725$ MHz with a multiplication range of 1-1023, and the RMS and peak-to-peak jitter are 5psec and 42.7 psec, respectively.

• 전력전자학회논문지
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• 제19권1호
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• pp.1-7
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• 2014

This paper proposes a current harmonic compensation method for the grid-connected inverter, especially caused by the grid impedance. Grid impedance causes low order harmonics in the grid current and deteriorates power quality. This paper analyzes the negative impact of the grid impedance, and proposes an active feedforward compensation method. Proposing method verified through simulation and experiment with 3-phase 1.5kW voltage source inverter prototype.

• 전력전자학회논문지
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• 제24권3호
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• pp.207-214
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• 2019

In this study, discrete-time domain analysis is proposed to investigate the input current of a buck AC/DC light-emitting diode (LED) driver. The buck power factor correction converter can operate in both discontinuous conduction mode (DCM) and continuous conduction mode (CCM). Two discontinuous and two continuous conduction operating modes are possible depending on which event terminates the conduction of the main switch in a switching cycle. All four operating modes are considered in the discrete-time domain analysis. The peak current-mode control with slope compensation is used to design a low-cost AC/DC LED driver. A slope compensation design of the buck AC/DC LED driver is described on the basis of a discrete-time domain analysis. Experimental results are presented to confirm the usefulness of the proposed analysis.