• Journal of the Korea Institute of Information and Communication Engineering
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• v.21 no.6
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• pp.1083-1091
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• 2017

This paper describes a design of cryptographic processor supporting 224-bit elliptic curves over prime field defined by NIST. Scalar point multiplication that is a core arithmetic function in elliptic curve cryptography(ECC) was implemented by adopting the modified Montgomery ladder algorithm. In order to eliminate division operations that have high computational complexity, projective coordinate was used to implement point addition and point doubling operations, which uses addition, subtraction, multiplication and squaring operations over GF(p). The final result of the scalar point multiplication is converted to affine coordinate and the inverse operation is implemented using Fermat's little theorem. The ECC processor was verified by FPGA implementation using Virtex5 device. The ECC processor synthesized using a 0.18 um CMOS cell library occupies 2.7-Kbit RAM and 27,739 gate equivalents (GEs), and the estimated maximum clock frequency is 71 MHz. One scalar point multiplication takes 1,326,985 clock cycles resulting in the computation time of 18.7 msec at the maximum clock frequency.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.27 no.4
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• pp.923-941
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• 2017

A side-channel attack is a method of attacking a cipher based on physical information of a cryptographic device. The masking method, which is a typical method overcoming this attack, is a method of calculating an arbitrary masking value at the round intermediate value through rounds. Thus, it is difficult to guess the intermediate value by the side-channel attack, but if the masking operation is applied to all rounds of the encryption algorithm, the encryption process may become overloaded. Therefore, it is practical to use a reduced-round masking technique that applies a masking technique to only a part of the cipher for lightweight equipment such as Internet of Things(IoT) and wearable devices. In this paper, we describe a Hamming weight filtering for SIMON family with reduced-round masking technique and it is shown that first round key recovery is possible through actual programming.

• Convergence Security Journal
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• v.12 no.4
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• pp.17-23
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• 2012

Recently, the research for cryptographic algorithm, in particular, a stream cipher has been actively conducted for wireless devices as growing use of wireless devices such as smartphone and tablet. LFSR based random number generator is widely used in stream cipher since it has simple architecture and it operates very fast. However, the conventional multi-LFSR RNG (random number generator) suffers from its hardware complexity as well as very closed correlation between the numbers generated. A leap-ahead LFSR was presented to solve these problems. However, it has another disadvantage that the maximum period of the generated random numbers are significantly decreased according to the relationship between the number of the stages of the LFSR and the number of the output bits of the RNG. This paper presents new leap-ahead LFSR architecture to prevent this decrease in the maximum period by applying segmentation technique to the conventional leap-ahead LFSR. The proposed architecture is implemented using VHDL and it is simulated in FPGA using Xilinx ISE 10.1, with a device Virtex 4, XC4VLX15. From the simulation results, the proposed architecture has only 20% hardware complexity but it can increases the maximum period of the generated random numbers by 40% compared to the conventional Leap-ahead archtecture.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.13 no.2
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• pp.382-389
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• 2009

As the use of mobile device is popularized, the needs of variable services of WiMAX technique and the importance of security is increasing. There is a problem that can be easily attacked from a malicious attack because the action is achieved connectionlessly between neighbor link establishing procedure and TEK exchange procedure in mobile WiMAX even though typical 1 hop network security technique is adapted to WiMAX for satisfying these security requirement. In this paper, security connected mechanism which safely connects neighbor link establishing procedure of WiMAX and TEK exchange procedure additional to the basic function provided by IEEE 802.16e standard to satisfy security requirement of mobile WiMAX is proposed. The proposed mechanism strengthens the function of security about SS and BS by application random number and private value which generated by SS and BS to public key of neighbor link establishing procedure and TEK exchange procedure. Also, we can prevent from inside attack like man-in-the-middle which can occur in the request of TEK through cryptographic connection of neighbor link establishing procedure and TEK exchange procedure.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.30 no.1C
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• pp.116-128
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• 2005

The low-cost REID system is expected to be widely used in the ubiquitous computing environment as an intelligent device. Although REID systems have several advantages, they may create new threats to users' privacy. In this paper, a traceable and unlinkable REID system called 'Fair EPC system' is proposed for low-cost RFID tags. The proposed system enables the protection of users' privacy from unwanted scanning, and it is traceable to the tag by authorized administrators when necessary. The proposed system has some advantages; (1) eliminating any danger of exposing users' information via tag tracking through the cooperation between readers or back-end databases, (2) enabling the tracking of real serial number of the tag only through the cooperation of authorized administrators using a cryptographic secret sharing scheme, and (3) providing the efficiency of the proposed system reduce the computational workloads of back-end databases.

• Journal of Digital Contents Society
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• v.18 no.5
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• pp.1001-1008
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• 2017

Because cyber attacks on industrial control systems can lead to massive financial loss or loss of lives, the standardization and the research on cyber security of industrial control systems are actively under way. As a related system, the industrial control system of social infrastructures must be equipped with the verified cryptographic module according to the e-government law and appropriate security control should be implemented in accordance with the security requirements of the industrial control system. However, the industrial control system consisting of the operation layer, the control layer, and the field device layer may cause a problem in performing the main function in each layer due to the security control implementation. In this paper, we propose things to check when performing security control in accordance with the security control requirements for each layer of the industrial control system and proper application.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.24 no.5
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• pp.987-999
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• 2014

A PUF is embedded and implemented into a tag or a device, and outputs a noise y with an input of x, based on its own unique physical characteristics. Although x is used multiple times as inputs of PUF, the PUF outputs slightly different noises, ($y_1,{\cdots}y_n$), and also the PUF has tamper-resistance property, hence it has been widely used in cryptographic protocol. In this paper, we study how to design a PUF-based RFID authentication protocol in a secure and an efficient way. Compared with recent schemes, the proposed scheme guarantees both authentication and privacy of backword/forward under the compromise of long-term secrets stored in tag. And also, the most cost and time-consumming procedure, key recovery algorithm used with PUF, has been desgined in the side of RFID reader, not in the tag, and, consequently, gives possibility to minimize costs for implementation and running time.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.24 no.6
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• pp.1091-1102
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• 2014

The power analysis attack is a cryptanalytic technique to retrieve an user's secret key using the side-channel power leakage occurred during the execution of cryptographic algorithm embedded on a physical device. Especially, many power analysis attacks have targeted on an exponentiation algorithm which is composed of hundreds of squarings and multiplications and adopted in public key cryptosystem such as RSA. Recently, a new correlation power attack, which is tried when two modular multiplications have a same input, is proposed in order to recover secret key. In this paper, after reviewing the principle of side-channel attack based on input collisions in modular multiplications, we analyze the vulnerability of some exponentiation algorithms having regularity property. Furthermore, we present an improved exponentiation countermeasure to resist against the input collision-based CPA(Correlation Power Analysis) attack and existing side channel attacks and compare its security with other countermeasures.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.24 no.3
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• pp.477-489
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• 2014

Based on some flaws occurred for implementing a public key cryptosystem in the embedded security device, many side-channel attacks to extract the secret private key have been tried. In spite of the fact that the cryptographic exponentiation is basically composed of a sequence of multiplications and squarings, a new Square Always exponentiation algorithm was recently presented as a countermeasure against side-channel attacks based on trading multiplications for squarings. In this paper, we propose Known Power Collision Analysis and modified Doubling attacks to break the Right-to-Left Square Always exponentiation algorithm which is known resistant to the existing side-channel attacks. And we also present a Collision-based Combined Attack which is a combinational method of fault attack and power collision analysis. Furthermore, we verify that the Square Always algorithm is vulnerable to the proposed side-channel attacks using computer simulation.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.21 no.8
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• pp.1471-1479
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• 2017

This paper describes a design of RSA public-key cryptography processor supporting key length of 2,048 bits. A modular multiplier that is core arithmetic function in RSA cryptography was designed using word-based Montgomery multiplication algorithm, and a modular exponentiation was implemented by using Left-to-Right (LR) binary exponentiation algorithm. A computation of a modular multiplication takes 8,386 clock cycles, and RSA encryption and decryption requires 185,724 and 25,561,076 clock cycles, respectively. The RSA processor was verified by FPGA implementation using Virtex5 device. The RSA cryptographic processor synthesized with 100 MHz clock frequency using a 0.18 um CMOS cell library occupies 12,540 gate equivalents (GEs) and 12 kbits memory. It was estimated that the RSA processor can operate up to 165 MHz, and the estimated time for RSA encryption and decryption operations are 1.12 ms and 154.91 ms, respectively.