• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1998년도 하계종합학술대회논문집
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• pp.534-537
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• 1998

In this paper, a set of novel self-timed latches are introduced and analyzed. These latches have no back-to-back connection as in conventional self-timed latch, and both inverting and noninerting outputs are evaluated simultaneously leading to thigher oepating frequencies. Power consumption of these latches ar ealso comparable to or less than that of conventional circuits. Novel type of cross-coupled inverter used in the proosed circuits implements static operatin without signal fighting with the main driver during signal transition. Proposed latches ar tested using a 0.6.mu.m triple-poly triple-metal n-well CMOS technology. The resutls indicates that proposed active-low sefl-timed latch (ALSTL) improves speed by 14-34% over conventional NAND SR latch, while in active-high self-timed latch (AHSTL) the improvements are 15-35% with less power as compared with corresponding NORA SR latch. These novel latches have been successfully implemented in a high-speed synchronous DRAM (SDRAM).

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2003년도 하계종합학술대회 논문집 II
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• pp.987-990
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• 2003

This paper presents a cross-coupled RF VCO with high-Q MEMS-based spiral inductors. Since the use of high-Q inductors is critical to VCO design, MEMS-based spiral inductors with the Q-factor of nearly 22 are used for the RF VCO with an active cascode current source. The RF VCO circuits including spiral inductors have been designed and simulated in GaAs MMIC-MEMS process. The simulation results of the VCO circuits showed the phase noise of -180dBc/Hz at an offset frequency of 500KHz. The RF VCO circuit simulatinon used 2mA DC current and 3.3V supply.

• 한국통신학회논문지
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• 제13권5호
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• pp.411-421
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• 1988

본 논문에서는 Tabular法을 이용한 CCD(charge-coupled device) 4値論理回路를 설계하는 방법을 제시하였다. 첫 번째 4値 논리함수를 수산(手算) 및 컴퓨터 프로그래밍에 의해서 분해하고 이것을 기초로 하여 Tabular法에 의한 CCD 4値회로를 실현시키는 알고리즘을 유도하였다. 이 알고리즘에 의해서 2變數 4値 논리함수를 분해(分解)해서 4개의 기본게이트에 의해서 CCD회로를 실현시켰다. 본 논문의 방법에 의하면 기존방법에 비해 동일한 함수를 실현시키는데 소자수(素子數)와 코스트가 상당히 감소됨이 밝혀졌다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2003년도 학술회의 논문집 정보 및 제어부문 A
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• pp.271-274
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• 2003

This paper presents a Built-in Current Sensor that detect defects in CMOS integrated circuits using the current testing technique. This scheme employs a cross-coupled connected PMOS transistors, it is used as a current comparator. Our proposed scheme is a negligible impart on the performance of the circuit undo. test (CUT). In addition, in the normal mode of the CUT not dissipation extra power, high speed detection time and applicable deep submicron process. The validity and effectiveness are verified through the HSPICE simulation on circuits with defects. The entire area of the test chip is $116{\times}65{\mu}m^2$. The BICS occupies only $41{\times}17{\mu}m^2$ of area in the test chip. The area overhead of a BICS versus the entire chip is about 9.2%. The chip was fabricated with Hynix $0.35{\mu}m$ 2-poly 4-metal N-well CMOS technology.

• Smart Structures and Systems
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• 제17권2호
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• pp.327-345
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• 2016

The existence of SH-wave in a piezomagnetic layer overlying an initially stressed orthotropic half-space is investigated. The coupled of differential equations are solved for piezomagnetic layer overlying an orthotropic elastic half-space. The general dispersion equation has been derived for both magnetically open circuit and magnetically closed circuits under the four types of boundary conditions. In the absence of the piezomagnetic properties, initial stress and orthotropic properties of the medium, the dispersion equations reduce to classical Love equation. The SH-wave velocity has been calculated numerically for both magnetically open circuit and closed circuits. The effect of initial stress and magnetic permeability are illustrated by graphs in both the cases. The velocity of SH-wave decreases with the increment of wave number.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2007년도 하계학술대회 논문집
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• pp.126-128
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• 2007

This paper presents a new soft switching dc-to-dc converter that employs IM transformer. Detailed analysis and design considerations of the proposed circuits are presented. By applying the proposed magnetic integration procedure, new integrated magnetic circuits featuring low loss, simple structure are then developed to overcome the limitations of prior art. Consequently, the power loss and the size of the integrated magnetic device are greatly reduced. The operation and performance of the proposed converter are demonstrated with an experimental converter that delivers a 5V/5A output from a 48V input at the maximum efficiency of 90 %.

• Journal of information and communication convergence engineering
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• 제5권2호
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• pp.150-154
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• 2007

Transponders of RFID system are classified as active or passive depending on the type of power supply they use. In passive transponders the data carrier has to obtain its power from the induced voltage. The induced voltage is converted into direct current using a low loss bridge rectifier and then smoothed. In practice, the induced voltage in the transponder coil is variable according to the coupling coefficient k and the load resistance ($R_L$). Therefore, the rectified voltage is unstable and the transponder of RFID is unstable sometimes. In this paper, a voltage-dependent shunt resistor ($R_s$) circuits are designed and inserted in parallel with the load resistance of RFID transponder in order to improve the stability of power.

• 한국전자파학회지:전자파기술
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• 제5권1호
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• pp.13-21
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• 1994

마이크로스트립 미앤더(meander) 선로를 해석하고 실험하여 저역통과 특성을 고찰하였다. 본 해석방법의 요체는 선로간 상호결합에 관한 해석적인 관계식에 밴드(bend)의 등가모델을 추가한 것이며 이의 수치계산은 빠르고 결합선로의 수에 제한을 받지 않느다. 4중 결합 미앤더 선로에 대한 해석 및 실험 결과들을 제시했으며, 이들이 잘 일치하고 있음을 보였다.

• 한국지능시스템학회:학술대회논문집
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• 한국퍼지및지능시스템학회 2000년도 추계학술대회 학술발표 논문집
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• pp.227-230
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• 2000

Chuas circuit is a simple electronic network which exhibits a variety of bifurcation and attractors. The circuit consists of two capacitors, an inductor, a linear resistor, and a nonlinear resistor. In this paper, a transmitter and a receiver using two identical Chuas circuits are proposed and synchronizations of a equivalent wire and wireless power line are investigated. Since the synchronization of the equivalent wire and wireless system is impossible by coupled synchronization, theory having both the drive-response and the coupled synchronization is proposed. As a result, the chaos synchronization has delay characteristics in the equivalent wire and wireless transmission system caused by the line parameters L and C.

• 한국정보통신학회:학술대회논문집
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• 한국해양정보통신학회 2000년도 추계종합학술대회
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• pp.259-262
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• 2000

Chua's circuit is a simple electronic network which exhibits a variety of bihucation and attractors. The circuit consists of two capacitors, an inductor, a linear resistor, and a nonlinear resistor. In this paper, a transmitter and a receiver using two identical Chua's circuits are proposed anti synchronizations of a equivalent power line are investigated. Since the synchronization of the equivalent power line system is impossible by coupled synchronization, theory having both the drive-response and the coupled synchronization is proposed. Af a result, the chaos synchronization has delay characteristics in the equivalent power line transmission system caused by the line parameters L and C.