• Title/Summary/Keyword: Coupled circuits

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A set of self-timed latches for high-speed VLSI

  • 강배선;전영현
    • Proceedings of the IEEK Conference
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    • 1998.06a
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    • pp.534-537
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    • 1998
  • In this paper, a set of novel self-timed latches are introduced and analyzed. These latches have no back-to-back connection as in conventional self-timed latch, and both inverting and noninerting outputs are evaluated simultaneously leading to thigher oepating frequencies. Power consumption of these latches ar ealso comparable to or less than that of conventional circuits. Novel type of cross-coupled inverter used in the proosed circuits implements static operatin without signal fighting with the main driver during signal transition. Proposed latches ar tested using a 0.6.mu.m triple-poly triple-metal n-well CMOS technology. The resutls indicates that proposed active-low sefl-timed latch (ALSTL) improves speed by 14-34% over conventional NAND SR latch, while in active-high self-timed latch (AHSTL) the improvements are 15-35% with less power as compared with corresponding NORA SR latch. These novel latches have been successfully implemented in a high-speed synchronous DRAM (SDRAM).

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RF VCO with High-Q MEMS-based Spiral Inductor (High-Q MEMS Spiral Inductor를 이용한 RF VCO)

  • 김태호;김경만;서희원;황인석;김삼동
    • Proceedings of the IEEK Conference
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    • 2003.07b
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    • pp.987-990
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    • 2003
  • This paper presents a cross-coupled RF VCO with high-Q MEMS-based spiral inductors. Since the use of high-Q inductors is critical to VCO design, MEMS-based spiral inductors with the Q-factor of nearly 22 are used for the RF VCO with an active cascode current source. The RF VCO circuits including spiral inductors have been designed and simulated in GaAs MMIC-MEMS process. The simulation results of the VCO circuits showed the phase noise of -180dBc/Hz at an offset frequency of 500KHz. The RF VCO circuit simulatinon used 2mA DC current and 3.3V supply.

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Tabular Methods for the Design of Multivalued Logic Circuits Using CCD (CCD를 이용한 다치논린회로의 설계에 관한 Tabular법)

  • 송홍복;정만영
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.13 no.5
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    • pp.411-421
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    • 1988
  • This paper offers a method to design CCD four-valued circuits using the tabular method. First, the four-valued logic function is decomposed by hand-calculation or computer program. Nest, the algorithm is derived form the tabular method based on the decomposition process to realize the DDC four-valued circuit. According to this algorithm, the two-variable four valued logic function is decomposed and realized by CCD network with four basic gates. The synthesis method in this paper proves that the number of devices and cost is considerably reduces as compared with the existing methods to realize the same logic functions.

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Design of a Built-In Current Sensor for CMOS IC Testing (CMOS 집적회로의 테스팅을 위한 새로운 내장형 전류감지 회로의 설계)

  • Hong, Seung-Ho;Kim, Jeong-Beom
    • Proceedings of the KIEE Conference
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    • 2003.11b
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    • pp.271-274
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    • 2003
  • This paper presents a Built-in Current Sensor that detect defects in CMOS integrated circuits using the current testing technique. This scheme employs a cross-coupled connected PMOS transistors, it is used as a current comparator. Our proposed scheme is a negligible impart on the performance of the circuit undo. test (CUT). In addition, in the normal mode of the CUT not dissipation extra power, high speed detection time and applicable deep submicron process. The validity and effectiveness are verified through the HSPICE simulation on circuits with defects. The entire area of the test chip is $116{\times}65{\mu}m^2$. The BICS occupies only $41{\times}17{\mu}m^2$ of area in the test chip. The area overhead of a BICS versus the entire chip is about 9.2%. The chip was fabricated with Hynix $0.35{\mu}m$ 2-poly 4-metal N-well CMOS technology.

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SH-wave in a piezomagnetic layer overlying an initially stressed orthotropic half-space

  • Kakar, Rajneesh;Kakar, Shikha
    • Smart Structures and Systems
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    • v.17 no.2
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    • pp.327-345
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    • 2016
  • The existence of SH-wave in a piezomagnetic layer overlying an initially stressed orthotropic half-space is investigated. The coupled of differential equations are solved for piezomagnetic layer overlying an orthotropic elastic half-space. The general dispersion equation has been derived for both magnetically open circuit and magnetically closed circuits under the four types of boundary conditions. In the absence of the piezomagnetic properties, initial stress and orthotropic properties of the medium, the dispersion equations reduce to classical Love equation. The SH-wave velocity has been calculated numerically for both magnetically open circuit and closed circuits. The effect of initial stress and magnetic permeability are illustrated by graphs in both the cases. The velocity of SH-wave decreases with the increment of wave number.

A New Soft Switching DC-to-DC Converter Employing Transformer-coupled inductor (인덕터 결합 변압기를 이용한 소프트 스위칭 하프브릿지 컨버터에 관한 연구)

  • Lee, Dal-Woo;Ahn, Tae-Young
    • Proceedings of the KIPE Conference
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    • 2007.07a
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    • pp.126-128
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    • 2007
  • This paper presents a new soft switching dc-to-dc converter that employs IM transformer. Detailed analysis and design considerations of the proposed circuits are presented. By applying the proposed magnetic integration procedure, new integrated magnetic circuits featuring low loss, simple structure are then developed to overcome the limitations of prior art. Consequently, the power loss and the size of the integrated magnetic device are greatly reduced. The operation and performance of the proposed converter are demonstrated with an experimental converter that delivers a 5V/5A output from a 48V input at the maximum efficiency of 90 %.

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A Study on Power Stability Improvement in the Inductive Coupled RFID Transponder System

  • Kim, Gi-Rae;Choi, Young-Kyu
    • Journal of information and communication convergence engineering
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    • v.5 no.2
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    • pp.150-154
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    • 2007
  • Transponders of RFID system are classified as active or passive depending on the type of power supply they use. In passive transponders the data carrier has to obtain its power from the induced voltage. The induced voltage is converted into direct current using a low loss bridge rectifier and then smoothed. In practice, the induced voltage in the transponder coil is variable according to the coupling coefficient k and the load resistance ($R_L$). Therefore, the rectified voltage is unstable and the transponder of RFID is unstable sometimes. In this paper, a voltage-dependent shunt resistor ($R_s$) circuits are designed and inserted in parallel with the load resistance of RFID transponder in order to improve the stability of power.

Analysis of Microstrip meander Lines Using the Mutual Couplings Between Lines and Equivalent Circuits for Bends (선로간 상호결합과 벤드의 등가회로를 이용한 마이크로스트립 미앤더 선로의 해석)

  • 이진홍;전중창;박위상
    • The Proceeding of the Korean Institute of Electromagnetic Engineering and Science
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    • v.5 no.1
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    • pp.13-21
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    • 1994
  • A numerical analysis and experimental investigation of microstrip meander lines is given with reference to their low-pass amplitude and phase characteristics. The analysis features the inclusion of equivalent circuit models for bends to analytical equations for the muntual couplings between lines. The numerical simulation is efficient and is not constrained by the number of the coupled lines. Experimental results for 4=coupled meander lines, which are in good agreement with the simulation, are included.

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Chaos synchronization of Chuas circuit with equivalent wire and wireless transmission (등가 유무선 선로를 가진 Chua 회로에서의 카오스 동기화)

  • 배영철
    • Proceedings of the Korean Institute of Intelligent Systems Conference
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    • 2000.11a
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    • pp.227-230
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    • 2000
  • Chuas circuit is a simple electronic network which exhibits a variety of bifurcation and attractors. The circuit consists of two capacitors, an inductor, a linear resistor, and a nonlinear resistor. In this paper, a transmitter and a receiver using two identical Chuas circuits are proposed and synchronizations of a equivalent wire and wireless power line are investigated. Since the synchronization of the equivalent wire and wireless system is impossible by coupled synchronization, theory having both the drive-response and the coupled synchronization is proposed. As a result, the chaos synchronization has delay characteristics in the equivalent wire and wireless transmission system caused by the line parameters L and C.

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Chaos Synchronization using Chua Circuit with Equivalent Power Line (등가 전력선을 가진 Chua 회로에서의 카오스 동기화)

  • 배영철
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2000.10a
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    • pp.259-262
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    • 2000
  • Chua's circuit is a simple electronic network which exhibits a variety of bihucation and attractors. The circuit consists of two capacitors, an inductor, a linear resistor, and a nonlinear resistor. In this paper, a transmitter and a receiver using two identical Chua's circuits are proposed anti synchronizations of a equivalent power line are investigated. Since the synchronization of the equivalent power line system is impossible by coupled synchronization, theory having both the drive-response and the coupled synchronization is proposed. Af a result, the chaos synchronization has delay characteristics in the equivalent power line transmission system caused by the line parameters L and C.

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