• Title/Summary/Keyword: Cost Driver

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Multi-channel Current Balancing Single Switch LED Driver for LED Backlight (LED Backlight를 위한 다채널 전류평형 단일스위치 LED 구동회로)

  • Hwang, Sang-Soo;Han, Sang-Kyoo
    • The Transactions of the Korean Institute of Power Electronics
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    • v.21 no.4
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    • pp.320-327
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    • 2016
  • We propose a multi-channel current-balancing single switch light-emitting diode (LED) driver for a 3D TV. Conventional LED drivers require non-isolated DC/DC converters as many as the number of LED channels, whereas the proposed LED driver needs only one power switch and several balancing capacitors instead of expensive non-isolated DC/DC converters. Therefore, the proposed driver features a simple structure with low cost and high efficiency. In particular, because its power switch can be turned off under the zero-current switching condition, the proposed driver has desirable advantages, such as improved electromagnetic interference characteristics and high efficiency. Moreover, it only uses a small number of DC blocking capacitors with no additional active devices for the current balancing of multi-channel LEDs. Therefore, the proposed driver exhibits high reliability and cost effectiveness. To confirm the validity of the proposed driver, we perform a theoretical analysis and present design considerations and experimental results obtained from a prototype that is applicable to a 46" LED TV.

Comparative Study on a Single Energy Recovery Circuits for Plasma Display Panels (PDPs)

  • Yi, Kang-Hyun;Choi, Seong-Wook;Moon, Gun-Woo
    • Proceedings of the KIPE Conference
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    • 2007.07a
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    • pp.159-162
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    • 2007
  • Comparative study on a low cost sustaining driver with single and dual path energy recovery circuits for plasma display panels (PDPs) is shown in this paper. The cost of PDPs has been still high and about half of the cost has been occupied by driving circuit. A simple sustaining driver is proposed to reduce the cost and size of driving circuit. The proposed driver has small number of devices and reactive components and there are two methods for charging and discharging PDPs such as single and dual path energy recovery circuits. A comparative research on two-types of energy recovery path is practiced to evaluate performance. As a result, the dual energy recovery path circuit has low power consumption, low surge current and high performance. To verify those results, experiment will be shown with 42-inch HD panel.

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Development of Integrated System of Time-Driven Activity-Based Costing(TDABC) Using Balanced Scorecard(BSC) and Economic Value Added(EVA) (BSC와 EVA를 이용한 TDABC 통합시스템의 개발)

  • Choi, Sungwoon
    • Journal of the Korea Safety Management & Science
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    • v.16 no.3
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    • pp.451-469
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    • 2014
  • The purpose of this study is to implement and develop the integrated Economic Value Added (EVA) and Time-Driven Activity-Based Costing (TDABC) model to seek both improvement of Net Operating Profit Less Adjusted Tax (NOPLAT) and reduction of Capital Charge (CC). Net Operating Profit Less Adjusted Tax (NOPLAT) can be maximized by reducing the indirect cost of an unused resource capacity increased by Cost Capacity Ratio (CCR) of TDABC. On the other hand, Capital Charge (CC) can be minimized by improving the efficiency of Invested Capital (IC) considered by Weighted Average Cost of Capital (WACC) of EVA. In addition, the integrated system of TDABC using Balance Scorecard (BSC) and EVA is developed by linking between the lagging indicators and the three leading indicators. The three leading indicators include customer, internal process and growth and learning perspectives whereas the lagging indicator includes NOPLAT and CC in terms of financial perspective. When the Critical Success Factor (CSF) of BSC is cascading as a cause and an effect relationship, time driver of TDABC and capital driver of EVA can be used efficiently as Key Performance Indicator (KPI) of BSC. For a better understanding of the proposed EVA/TDABC model and BSC/EVA/TDABC model, numerical examples are derived from this paper. From the proposed model, the time driver of TDABC and the capital driver of EVA are known to lessen indirect cost from comprehensive income statement when increasing the efficiency of operating IC from the statement of financial position with unified KPI cascading of aligned BSC CSFs.

Cost Effective Plasma Display Panel TV Driving system with an address misfiring compensation circuit (어드레스 오방전 보상 저가형 플라즈마 디스플레이 패널 TV 구동 시스템)

  • Yi, Kang Hyun;Lee, Dae Sik
    • Journal of Korea Society of Industrial Information Systems
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    • v.18 no.3
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    • pp.1-8
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    • 2013
  • Plasma display panel (PDP) televisions are facing to have a new chance to receive attention along with a boom in 3-D software and contents because PDP can provide the comfortable and realistic 3-D images. The PDP has three driving circuit boards such as X, Y and addressing boards. Cost effective driving waveform has already been reported to decrease the number of driving circuit board. Half bridge based sustaining driver can remove a sustaining driver in the X board. However, the biasing circuit in the X driving boards cannot be reduced because there are some drawbacks such as unstable gas discharge condition and unreliability of an address driver IC. In this paper, the half bridge based sustaining driver is considered and a simple address driver is proposed to remove one driving board, X driving board. The stable gas discharge condition, reliability of the address driver IC and the low cost can be obtained by the proposed circuit.

A Study on Gate driver with Boot-strap chain to Drive Multi-level PDP Driver Application (Multi-level PDP 구동회로를 위한 Gate driver의 Boot-strap chain에 관한 연구)

  • Nam, Won-Seok;Hong, Sung-Soo;SaKong, Suk-Chin;Roh, Chung-Wook
    • The Transactions of the Korean Institute of Power Electronics
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    • v.11 no.2
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    • pp.120-126
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    • 2006
  • A gate driver with Boot-strap chain is proposed to drive Multi-level PDP sustain switches. The proposed gate driver uses only one boot-strap capacitor and one diode per each MOSFETs switch without floating power supply. By adoption of this gate driver circuits, the size, weight and the cost of the driver board can be reduced.

Operation of NMOSFET-only Scan Driver IC for AC PDP (NMOSFET으로 구성된 AC PDP 스캔 구동 집적회로의 동작)

  • 김석일;정주영
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.40 no.7
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    • pp.474-480
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    • 2003
  • We designed and tested a new scan driver output stage. Compared to conventional CMOS structured scan driver IC′s, the new NMOSFET-only scan driver circuit can reduce the chip area and therefore, the chip cost considerably. We confirmed the circuit operation with open drain power NMOSFET IC′s by driving 2"PDP test panel. We defined critical device parameters and their optimization methods lot the best circuit performance.

Multi Function IGBT Gate Driver Including Arm Short Protection (Arm Short 보호 기능을 포함한 다기능 IGBT GATE DRIVER)

  • 이경복;조국춘;최종묵
    • Proceedings of the KSR Conference
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    • 2000.05a
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    • pp.202-209
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    • 2000
  • This paper introduces the main function and protection method of IGBT gate driver that designed by KOROS. Recently, the applications of insulated gate bipolar transistors(IGBTs) have expanded widely, particularly in the area of railway converters. This driver is suitable for railway traction applications, so they are designed for circumstance of railway vehicle such as vibration. The input control power for this driver is supplied from battery charger of railway. it is no necessary an isolated power supply board or auxiliary power supply, with substantial savings in cost and space in railway applications. This gate driver can be used wide range of input voltage. So, performance of the driver has no relation with the battery voltage(70V∼110V). The protection methods of IGBT gate driver have many kind of ways, but this gate driver it designed to apply to converter for railway system, so this gate driver includes protection for arm short current and low control power voltage, etc. And the process of protection method and protection reference value are optimized by means of sufficient test with our own facilities.

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Low-Cost High-Efficiency PDP Sustaining Driver with a Resonance Bias Level Shift

  • Park, Kyung-Hwa;Yi, Kang-Hyun
    • Journal of Power Electronics
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    • v.13 no.5
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    • pp.779-786
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    • 2013
  • A highly efficient sustaining driver is proposed for plasma display panels (PDPs). When the PDP is charged and discharged, the proposed sustaining driver employs an address voltage source used in an addressing period. A voltage source is used for fully charging the panel to the sustaining voltage, and an initial inductor current helps the panel discharge to 0 V. The resonance between the panel and an inductor is made by shifting the voltage and current bias level when charging and discharging the panel. As a result, the proposed circuit can reduce power consumption, switching loss, heat dissipation, and production cost. Experimental results of a 42-inch PDP are provided to verify the operation and features of the proposed circuit.

A Study for Designing of Intelligent Lighting Control LED Apparatus (지능형 조명 제어 시스템용 LED 단말기 개발)

  • Yoo, Soo-Yeub;Lee, Gi-Heon
    • Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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    • 2008.10a
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    • pp.101-104
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    • 2008
  • This paper is a report of designing for LED lights driver unit. The main purpose of driver designing is high electrical efficient performance and intelligent control LED driver. This LED driver can be used for intelligent light control. This product expects to improve the light control by dimming instead of interlace on/off light control that increases the social cost such as car accidents and etc.

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The PLD Design of New Scheme LCD Driver Circuit (새로운 LCD 구동회로의 PLD 설계)

  • 이주현;이승호
    • Proceedings of the IEEK Conference
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    • 1999.11a
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    • pp.947-950
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    • 1999
  • The PLD design of new scheme LCD driver circuit is described in this paper. A new scheme LCD driver circuit doesn't used microprocessor for the convenience of users. A new scheme LCD driver circuit consists of 4 main parts, that is, a serial/parallel communication control block part, a LCD controller part, a LCD driver part and a RAM/ROM control block part. The validity and efficiency of the proposed LCD driver circuit have been verified by simulation and by ALTERA EPM7192SQC160-15 PLD implementation in VHDL. After comparing this LCD driver circuit to specify it was verified that the developed LCD driver circuit showed has good performances, such as low cost, convenience of users.

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