• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 한국해양정보통신학회 2007년도 추계종합학술대회
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• pp.187-191
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• 2007

This paper describes a 3.3V 10 bit CMOS digital-to-analog converter with a divided architecture of a 7 MSB and a 3 LSB, which uses an optimal Thermal-to-Binary Decoding method with monotonicity, glitch energy. The output stage utilizes here implements a return-to-zero circuit to obtain the dynamic performance. Most of D/A converters in decoding circuit is complicated, occupies a large chip area. For these problems, this paper describes a D/A converter using an optimal Thermal-to-Binary Decoding method. the designed D/A converter using the CMOS n-well $0.35{\mu}m$ process0. The experimental data shows that the rise/fall time, settling time, and INL/DNL are 1.90ns/2.0ns, 12.79ns, and a less than ${\pm}2.5/{\pm}0.7$ LSB, respectively. The power dissipation of the D/A converter with a single power supply of 3.3V is about 250mW.

• Journal of Power Electronics
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• 제16권5호
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• pp.1904-1917
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• 2016

The moving average filter (MAF) is widely utilized to improve the disturbance rejection capability of phase-locked loops (PLLs). This is of vital significance for the grid-integration and stable operation of power electronic converters to electric power systems. However, the open-loop bandwidth is drastically reduced after incorporating a MAF into the PLL structure, which makes the dynamic response sluggish. To overcome this shortcoming, some new techniques have recently been proposed to improve the transient response of MAF-based PLLs. In this paper, a comprehensive performance comparison of advanced MAF-based PLL algorithms is presented. This comparison includes HPLL, MPLC-PLL, QT1-PLL, and DMAF-PLL. Various disturbances, such as grid voltage sag, voltage flicker, harmonics distortion, phase-angle and frequency jumps, DC offsets and noise, are considered to experimentally test the dynamic performances of these PLL algorithms. Finally, an improved positive sequence extraction method for a HPLL under the frequency jumps scenario is presented to compensate for the steady-state error caused by non-frequency adaptive DSC, and a satisfactory performance has been achieved.

• Journal of Power Electronics
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• 제16권2호
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• pp.685-694
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• 2016

This paper presents a reliability assessment model for the power semiconductors used in wind turbine power converters. In this study, the thermal loadings at different timescales of wind speed are considered. First, in order to address the influence of long-term thermal cycling caused by variations in wind speed, the power converter operation state is partitioned into different phases in terms of average wind speed and wind turbulence. Therefore, the contributions can be considered separately. Then, in regards to the reliability assessment caused by short-term thermal cycling, the wind profile is converted to a wind speed distribution, and the contribution of different wind speeds to the final failure rate is accumulated. Finally, the reliability of an actual power converter semiconductor for a 2.5 MW wind turbine is assessed, and the failure rates induced by different timescale thermal behavior patterns are compared. The effects of various parameters such as cut-in, rated, cut-out wind speed on the failure rate of power devices are also analyzed based on the proposed model.

• Journal of Power Electronics
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• 제16권2호
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• pp.717-730
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• 2016

The harmonic components of grid voltage result in oscillations of the calculated phase obtained via phase synchronization. This affects the security and stability of grid-connected converters. Moving average filter, delayed signal cancellation and their related harmonic elimination algorithms are major methods for such issues. However, all of the existing methods have their limitations in dealing with multiple harmonics issues. Furthermore, few studies have focused on a comparison and evaluation of these algorithms to achieve optimal algorithm selections in specific applications. In this paper, these algorithms are quantitatively analyzed based on the derived mathematical models. Moreover, an enhanced moving average filter and enhanced delayed signal cancellation algorithms, which are applicable for eliminating a group of selective harmonics with only one calculation block, are proposed. On this basis, both a comprehensive comparison and a quantitative evaluation of all of the aforementioned algorithms are made from several aspects, including response speed, required data storage size, sensitivity to sampling frequency, and elimination of random noise and harmonics. With the conclusions derived in this paper, better overall performance in terms of harmonic elimination can be achieved. In addition, experimental results under different conditions demonstrate the validity of this study.

• Journal of Power Electronics
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• 제16권5호
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• pp.1869-1883
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• 2016

In recent years, some converter structures and analyzing methods for the voltage regulation of stand-alone self-excited induction generators (SEIGs) have been introduced. However, all of them are concerned with the three-phase voltage control of three-phase SEIGs or the single-phase voltage control of single-phase SEIGs for the operation of these machines under balanced load conditions. In this paper, each phase voltage is controlled separately through separated converters, which consist of a full-bridge diode rectifier and one-IGBT. For this purpose, the principle of the electronic load controllers supported by fuzzy logic is employed in the two-different proposed converter structures. While changing single phase consumer loads that are independent from each other, the output voltages of the generator are controlled independently by three-number of separated electronic load controllers (SELCs) in two different mode operations. The aim is to obtain a rated power from the SEIG via the switching of the dump loads to be the complement of consumer load variations. The transient and steady state behaviors of the whole system are investigated by simulation studies from the point of getting the design parameters, and experiments are carried out for validation of the results. The results illustrate that the proposed SELC system is capable of coping with independent consumer load variations to keep output voltage at a desired value for each phase. It is also available for unbalanced consumer load conditions. In addition, it is concluded that the proposed converter without a filter capacitor has less harmonics on the currents.

• The Journal of Korean Institute of Communications and Information Sciences
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• 제29권8B호
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• pp.721-729
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• 2004

In this paper, we applied a group scheduling algorithm to core nodes in an optical burst switching (OBS) network and measured its performance by simulation. For the case of core nodes with multi-channel input/output ports, performance of the group scheduling has been compared to that of the immediate scheduling. Since the group scheduling has a characteristic of scheduling a group of bursts simultaneously in a time window using information collected from corresponding burst header packets arrived earlier to a core node, simulation results show that the group scheduling outperforms the immediate scheduling in terms of both burst loss probability and channel utilization and the difference gets larger as the load increases. Another node configuration in which wavelength converters are equipped at the output ports has also been considered. In this case, even though both performance metrics of the group scheduling are almost the same as those of the immediate scheduling in the offered load range between 0.1 and 0.9, the group scheduling has lower wavelength conversion rate than the immediate scheduling by at least a factor of seven. This fact leads us to the conclusion that the group scheduling makes it possible to implement more economical OBS core nodes.

• Journal of Electrical Engineering and Technology
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• 제9권1호
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• pp.143-153
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• 2014

This paper presents a novel application of LCC resonant converter for 60kW EV fast charger and describes development of the high efficiency 60kW EV fast charger. The proposed converter has the advantage of improving the system efficiency especially at the rated load condition because it can reduce the conduction loss by improving the resonance current shape as well as the switching loss by increasing lossless snubber capacitance. Additionally, the simple gate driver circuit suitable for proposed topology is designed. Distinctive features of the proposed converter were analyzed depending on the operation modes and detail design procedure of the 10kW EV fast charger converter module using proposed converter topology were described. The proposed converter and the gate driver were identified through PSpice simulation. The 60kW EV fast charger which generates output voltage ranges from 50V to 500V and maximum 150A of output currents using six parallel operated 10kW converter modules were designed and implemented. Using 60kW fast charger, the charging experiments for three types of high-capacity batteries were performed which have a different charging voltage and current. From the simulation and experimental results, it is verified that the proposed converter topology can be effectively used as main converter topology for EV fast charger.

• Journal of Power Electronics
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• 제13권4호
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• pp.626-635
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• 2013

An analysis of the junction capacitance in resonant rectifiers which has a significant impact on the operating point of resonance circuits is studied in this paper, where the junction capacitance of the rectifier diode is to decrease the resonant current and output voltage in the circuit when compared with that in an ideal rectifier diode. This can be represented by a simplified series resonant equivalent circuit and a voltage transfer function versus the normalized operating frequency at varied values of the resonant capacitor. A low voltage to high voltage push-pull DC/DC resonant converter was used as a design example. The design procedure is based on the principle of the half bridge class-DE resonant rectifier, which ensures more accurate results. The proposed scheme provides a more systematic and feasible solution than the conventional resonant push-pull DC/DC converter analysis methodology. To increase circuit efficiency, the main switches and the rectifier diodes can be operated under the zero-voltage and zero-current switching conditions, respectively. In order to achieve this objective, the parameters of the DC/DC converter need to be designed properly. The details of the analysis and design of this DC/DC converter's components are described. A prototype was constructed with a 62-88 kHz variable switching frequency, a 12 $V_{DC}$ input voltage, a 380 $V_{DC}$ output voltage, and a rated output power of 150 W. The validity of this approach was confirmed by simulation and experimental results.

• The Transactions of the Korean Institute of Power Electronics
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• 제18권1호
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• pp.45-53
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• 2013

Fuel cell power system is one of the most promising energy source for the alternative energy because it has unique advantages such as high energy density, no power drop during operation, and feasible to make compact size. However, due to very low response time, fuel cell is difficult to correspond to drastic load changes and start-up operation. For solving these problem, fuel cell power system must include energy storage device such as Li-Poly battery or super capacitor. Therefore, bi-directional DC-DC converter must be required for this storage device and fuel cell-PCS control. This paper presents a design and modeling of the bi-directional DC/DC converter. Firstly, we present modeling the boost and buck mode of the bi-directional converter through both PWM switch model and state space averaging technique. Secondly, in order to minimize output ripple and transient response overshoot, we have two identical DC-DC converters interleaved and adopt two-loop voltage-current controller. The proposed bi-directional DC-DC converter's modeling method and control design have been verified with computer simulation and experimentation.

• Journal of Power Electronics
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• 제18권3호
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• pp.931-943
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• 2018

Wireless power transfer (WPT) technology has been the focus of a lot of research due to its safety and convenience. The Z-source inverter (ZSI) was introduced into WPT systems to realize improved system performance. The ZSI regulates the dc-rail voltage in WPT systems without front-end converters and makes the inverter bridge immune to shoot-through states. However, when the WPT system is combined with a ZSI, the system parameters must be configured to prevent the ZSI from entering an "accidental shoot-through" (AST) state. This state can increase the THD and decrease system power and efficiency. This paper presents a mathematical analysis for the characteristics of a WPT system and a ZSI while addressing the causes of the AST state. To deal with this issue, the impact of the system parameters on the output are analyzed under two control algorithms and the primary compensation capacitance range is derived in detail. To validate the analysis, both simulations and experiments are carried out and the obtained results are presented.