• 대한전기학회:학술대회논문집
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• 대한전기학회 1992년도 하계학술대회 논문집 B
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• pp.1029-1031
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• 1992

This paper discussed the operational principles and characteristics of Voltage-Resonant Type DC-DC Converter of HF-Bridge Inverter Switching Control using A-SCR as switching elements. The characteristics of DC/DC Converter circuits were analyzed using the diagrams of design circuits and dimensionless control variables.

• 대한전기학회논문지:전기기기및에너지변환시스템부문B
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• 제50권10호
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• pp.501-507
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• 2001

In this paper, new high-efficiency zero voltage switching (ZVS) AC-DC boost converter is proposed to achieve power factor correction by simplifing energy recovery circuit. A lot of high power factor correction circuits have been proposed and applied to increase input power factor and efficiency. Most of these circuits may obtain unity power factor and achieve sinusoidal current waveform with zero voltage or/and zero current switching. However, it is difficult for them to obtain low cost, small size, low weight, and low noise. The topology proposed to improve these problems can compact the devices in circuit and can achieve high efficiency ZVS AC-DC boost converter. Simulation and experimental results show that this topology is capable of obtaining high power factor and increasing the efficiency of the system.

• KIEE International Transaction on Electrical Machinery and Energy Conversion Systems
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• 제4B권2호
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• pp.65-72
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• 2004

Switching power supply systems are widely used in many industrial fields. Power factor correction (PFC) circuits have a tendency to be applied in new power supply designs. The input active power factor correction (APFC) circuits can be implemented in either the two-stage approach or the single-stage approach. The two-stage approach can be classified into boost type PFC circuit and dc/dc converter. The power factor correction circuit with a boost converter used as an input power source is studied in this paper. In a boost power factor correction circuit there are two feedback control loops, which are a current feedback loop and a voltage feedback loop. In this paper, the regulation performance of output voltage and compensator to improve the transient response presented at the continuous conduction mode (CCM) of the boost PFC circuit is analyzed. The validity of designed boost PFC circuit is confirmed by MATLAB simulation and experimental results.

• 전자공학회논문지A
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• 제33A권6호
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• pp.230-238
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• 1996

In this paper, digital corrction and calibration circuit for a high-resolution CMOS pipelined A/D converter are proposed. The circuits were actually applied to a 12 -bit 4-stage pipelined A/D converter which was implemented in a 0.8${\mu}$m p-well CMOS process. The proposed digital correction logic is based on optimum multiplexer and two nonoverlapping clock phases resulting in a small die area snd a modular pipelined architecture. The propsoed digital calibration logic which consists of calibration control logic, error averaging logic, and memory can effectively perform self-calibration with little modifying analog functional bolcks of a conventional pipelined A/D conveter.

• 대한의용생체공학회:학술대회논문집
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• 대한의용생체공학회 1998년도 추계학술대회
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• pp.165-166
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• 1998

A multi-parameter neuro muscular electrical simulator (NMES) system was developed to be used to find the optimal parameter condition in obtaining maximum muscle power and minimal fatigue. Since the performance of NMES is mainly determined by the characteristic of its output-stage circuit, we implemented 3 different circuits and compared output characteristics of them. Three amplifier circuits are; 1) a resonant switching converter, 2) a linear amplifier with a transformer, and 3) a step-up DC/DC converter with a high-voltage linear amplifier. Experimental results showed that the step up DC/DC converter with a high-voltage linear amplifier has the best performance.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2004년도 하계학술대회 논문집 B
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• pp.1214-1216
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• 2004

Conventional Switched Mode Power Supplies(SMPS) with diode-capacitor rectifier have distorted input current waveform with high harmonic contents. Typically, these SMPS have a power factor lower than 0,65. To improve with this problem the power factor correction(PFC) circuit of power supplies has to be introduced. PFC circuit have tendency to be applied in new power supply designs. The input active power factor correction circuits can be implemented using either the two-stage or the single-stage approach. In this paper, the comparative analysis of power factor correction circuit using feedforward control with average current mode single-stage flyback method converter and two-stage converter which is combination of boost and flyback converter. The two prototypes of 50W were designed and tested a laboratory experimental. Also, the comparative analysis is confirmed by simulation and experimental results.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1991년도 하계학술대회 논문집
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• pp.512-515
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• 1991

The advantages of poly-phase converter are to be able to reduce the ripple current and to lessen the weight of power inductors. This paper is derived the equivalent circuit, dc of and ac modeling circuit of a 3-phase multiple buck converter by using state space representation and averaging techniche. Futhermore, it is represented the equivalent circuits according to the duty cycle.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1989년도 하계종합학술대회 논문집
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• pp.510-514
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• 1989

This paper presents a new converter composed of a P.W.M controller and a resonant converter which operates at a constant frequency. This converter has relatively simple control circuits and high conversion efficiency. The optimum operating point corresponding to maximum efficient for the S.R.C and P.R.C operating above resonance is obtained.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2000년도 추계종합학술대회 논문집(2)
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• pp.71-74
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• 2000

The purpose of format conversion is to convert a wide range of personal computer video formats into a target format. Circuits for the conversion have been developed by means of interpolation techniques, such as zero-order interpolation, bilinear interpolation, and bisigmoidal interpolation. This paper proposes a scan converter using cubic splines. The converter was modeled in VHDL on Max+PlusII and implemented with an FPGA chip. The circuit gives much better conversion performance than a scan converter with zero-order or linear interpolation.

• 전력전자학회:학술대회논문집
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• 전력전자학회 1998년도 Proceedings ICPE 98 1998 International Conference on Power Electronics
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• pp.709-712
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• 1998

A new ZVS-CV PWM converter with power factor correction (PFC) function is presented in this paper. The new topology is a integration of a boost converter and a ZVS-CV topology in a single power conversion stage. The new converter can be regulated in pulse-width modulation (PWM) by universal integrated control circuits. Some design considerations are given in detail. A laboratory prototype has been implemented to show the feasibility of the approach and the analysis.