• KSII Transactions on Internet and Information Systems (TIIS)
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• v.15 no.3
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• pp.837-852
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• 2021

Recurrent neural network (RNN) architectures have been used for language modeling (LM) tasks that require learning long-range word or character sequences. However, the RNN architecture is still suffered from unstable gradients on long-range sequences. To address the issue of long-range sequences, an attention mechanism has been used, showing state-of-the-art (SOTA) performance in all LM tasks. A differentiable neural computer (DNC) is a deep learning architecture using an attention mechanism. The DNC architecture is a neural network augmented with a content-addressable external memory. However, in the write operation, some information unrelated to the input word remains in memory. Moreover, DNCs have been found to perform poorly with low numbers of weight parameters. Therefore, we propose a robust memory deallocation method using a limited retention vector. The limited retention vector determines whether the network increases or decreases its usage of information in external memory according to a threshold. We experimentally evaluate the robustness of a DNC implementing the proposed approach according to the size of the controller and external memory on the enwik8 LM task. When we decreased the number of weight parameters by 32.47%, the proposed DNC showed a low bits-per-character (BPC) degradation of 4.30%, demonstrating the effectiveness of our approach in language modeling tasks.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.15 no.10
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• pp.857-867
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• 1990

Sine CAM structure is regular structure as that of RAM of PLA, CAM generator program is easy to implement. This program outputs CAM layout in the form of CIF(Caltech Intermediate Format) and graphic display program is debugging or displaying CAM generator output, which are implemented on PC/AT with MS C(5.0) graphic library and C language. CIF parser is programmed with YACC(Yet Another Compiler Compiler) and LEX (Lexical Analyzer) in order to flat the CIF data. For the purposed of plotting the layout output using ROLAND XY plotter is developed. By combining these program described above, from CIF generation to layout plotting can be executed on pull-down menu according to user's option.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.19 no.6
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• pp.1056-1063
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• 1994

In this paper a content addressable memory (CAM) is designed by adopting best-match method. It has a single processing element(PE) architecture with high computational efficiency and throughput. It is composed of three main functional blocks(input MUX, best-match CAM, control part). It support fully parallel processing. Logic simulation is completed by using QUICKSIM, Circuit simulation is performanced by using HSPICE. Its layout is based on the ETRI 3 m n-well process design rules. Its maximum operating frequency is 20 MHz.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.32B no.8
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• pp.1057-1063
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• 1995

This paper describes an approach for constucting a Rectilinear Steiner Tree (RST) derivable from a Minimum Spanning Tree (MST), using Associative Processor (AP). We propose a fast parallel algorithm using AP's basic algorithms which can be realized by the processing capability of rudimentary logic and the selective matching capability of Content- Addressable Memory (CAM). The main idea behind the proposed algorithm is to maximize the overlaps between the consecutive edges in MST, thus minimizing the cost of a RST. An efficient parallel linear algorithm with O(n) complexity to construct a RST is proposed using an algorithm to find a MST, where n is the number of nodes. A node insertion method is introduced to allow the Z-type layout. The routing process which only depends on the neighbor edges and the no-rerouting strategy both help to speed up finding a RST.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.22 no.7
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• pp.1403-1410
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• 1997

Because streaming mode connection server suitable to wide area ATM networks performs transmission, reception and lookup with time restriction for the transmission time of a cell, it has demerits of large cell loss incase that burst traffic occurs. Therefore, in this paper to decrease cell loss we propose a high speed CAM (Content Addressable Memory) which is capable of processing data of streaming mode connections server at a high speed. the proposed CAM is applied to forwarding table VPC map which performs function to output connection numbers about input VPI(Virtual Path Identifier)/VCI(Virtual Channel Identifier). The designed high speed CAM consist of DBL(Dual Bit Line) CAM structure performed independently write operation and match operation and two-port SRAM structure. Also, its simulation verification and full-custom layout is performed by Hspice and Composs tools in 0.8 .$\mu$m design rule.

• Proceedings of the IEEK Conference
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• 2000.07a
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• pp.533-536
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• 2000

In this paper, we proposed high performance packet forwarding engine for asynchronous transfer mode(ATM) based gigabit routers. The forwarding engine is based on ATM switch and accommodates four 622Mbps ports. The forwarding engine has been designed to be able to process the Intemet protocol(IP) packet at 2.5Gbps using the pipelined If header processing and lookup control mechanism. For high performance packet forwarding, we used content addressable memory(CAM) based routing coprocessor operating in hardware and implemented the pipelined lookup control function into a field programmable gate array(FPGA). The pipelined packet header processing mechanism enhanced the forwarding performance of the If packets ingressed from four different 622Mbps ports. Moreover, the If lookup controller designed to have the performance up to 12.5Mpps. The proposed forwarding engine is also designed to support differentiated services(DS) and multiprotocol label switching(MPLS).

• The Journal of Korean Institute of Communications and Information Sciences
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• v.26 no.6A
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• pp.1107-1116
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• 2001

고속 IP 주소 룩업(lookup)은 고속 인터넷 라우터의 성능을 좌우하는 주요 요소이다. LPM(longest prefix matching) 탐색은 IP 주소 룩업에서 가장 시간이 많이 걸리는 부분이다. PICAM은 고속 LPM 탐색을 위한 파이프라인 CAM 구조로서, 기존 CAM(content addressable memory, 내용 주수화 메모리)을 이용한 방법보다 룩업 테이블의 갱신속도가 빠르면서도 LPM 탐색율이 높은 CAM 구조이다. PICAM은 3단계의 파이프라인으로 구성된다. 단계 1 및 단계 2의 키필드분할수 및 매칭점의 분포에 따라 파이프라인의 성능이 좌우되며, LPM 탐색율이 달라질 수 있다. 본 논문에서는 PICAM의 파이프라인 성능모델을 제시하고, 이산사건 시뮬레이션(discrete event simulation)을 수행하여, 최적의 PICAM 구조를 도출하였다. IP version 4인 경우 키필드분할수를 8로 하고, 부하가 많이 걸리는 키필드블록을 중복 설치하는 것이 최적구조이며, IP version 6인 경우 키필드블록의 개수를 16으로 하는 것이 최적구조다.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.32A no.4
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• pp.93-102
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• 1995

This paper introduces a general purpose Associative Processor(AP) which is very efficient for search-oriented applications. The proposed architecture consists of three main functional blocks: Content-Addressable Memory(CAM) arry, row logic, and control section. The proposed AP is a Single-Instruction, Multiple-Data(SIMD) device based on a CAM core and an array of high speed processors. As an application for the proposed hardware, we present a parallel algorithm to solve a global routing problem in the layout process utilizing the processing capabilities of a rudimentary logic and the selective matching and writing capability of CAMs, along with basic algorithms such a minimum(maximum) search, less(greater) than search and parallel arithmetic. We have focused on the simultaneous minimization of the desity of the channels and the wire length by sedking a less crowded channel with shorter wire distance. We present an efficient mapping technique of the problem into the CAM structure. Experimental results on difficult examples, on randomly generated data, and on benchmark problems from MCNC are included.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.44 no.10
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• pp.162-168
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• 2007

TCAM(Ternary content-addressable memory) has been widely used to perform fast routing lookup. It is able to accomplish the LPM(longest prefix matching) search in O(1) time without considering the number of prefixes and their lengths. As compared to software-based solutions, especially for IPv6, TCAM can oner sustained throughput and simple system architecture. However, There is no research for Priority-TCAM which can assign priority to each memory block. This paper addresses the difference or priority-TCAM compared to the existing TCAM and proposes CAO-PA algerian to manage the lookup table efficiently.

• Journal of IKEEE
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• v.9 no.1 s.16
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• pp.19-30
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• 2005

Packet classification is defined as the action to match the packet with a set of predefined rules. One of classification is to use Ternary Content Addressable Memory hardware search engine that has faster than other algorithmic methods. However, TCAM has some limitations. One of them is that TCAM can not perform range matching efficiently. A range has to be expanded into prefixes to fit the boundary. In general, the number of expansion could be up to 2w-2, where w is the width of the field. For example, if two range fields with 16 bits are used, there could be up to $30\;{\times}\;30\;=\;900$ expansions for a single rule. In this paper, we describe the novel algorithm for converting range matching rules into TCAM entry efficiently. The number of maximum entry is 2w-4 when using the algorithm. Furthermore, it has also benefit about the negation range. In the result of experimentation, the new scheme practically reduces 14 percent in case that searched fields are source port and destination port number.