• Journal of Biosystems Engineering
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• 제13권3호
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• pp.59-70
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• 1988

A computer simulation model for rice circulating concurrent-flow dryer was developed and verified by conduction a series of pilot-scale experiment. The effects of design parameter and operating conditions on dryer performance were analyzed by using simulation. The results indicated that the developed model was found suitable for analyzing operating characteristics. The other results from simulation also showed that; 1) an increse in the initial moisture content resulted in an increase in the drying rate and a reduction in the grain temperature and total energy requirements. 2) an increase in the drying air temperature resulted in an increase in the drying rate and grain temperature. 3) an increase in air flow rate resulted in an radical increase in drying rate, fan power requirements and total energy requirements but an radical decrease in final head rice yield. 4) an increase in the bed depth resulted in an increase in fan power requirements and a lowering of the final head rice yield.

• Journal of Biosystems Engineering
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• 제31권4호
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• pp.349-354
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• 2006

This study was performed to evaluate the performances for a concurrent flow rice dryer of pilot scale with devices for circulating rice. The pilot scale dryer with the capacity of 700 kg was developed to obtain design informations for the development of actual scale dryer of holding capacity of 10 tons. Three drying tests were conducted at two temperature levels of $100^{\circ}C\;and\;120^{\circ}C$, and two air flow rates levels of $28.5cmm/m^2\;and\;57.1cmm/m^2$. Drying conditions for Test-1, Test-2 and Test-3 were $100^{\circ}C\;-28.5cmm/m^2,\;120^{\circ}C-28.5cmm/m^2\;and\;120^{\circ}-57.1cmm/m^2}$ respectively. Drying rates were 0.73%(w.b./h) for Test-1, 0.90%(w.b./h) for Test-2 and 1.46%(w.b./h) for Test-3. The crack ratios of brown rice after drying ranged from 2.4% to 8.4%, and increased with the increase of drying rate and airflow rate. The energy consumptions were from 6,225 kJ/kg to 6,993 kJ/kg which was higher than that of conventional cross-flow rice circulating type dryer used in Korea. This results were due to the lower ambient air temperatures of $4.5^{\circ}C\;to\;13.4^{\circ}C$ during drying tests.

• KSII Transactions on Internet and Information Systems (TIIS)
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• 제9권7호
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• pp.2354-2370
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• 2015

The advantages of employing SCTP-based Concurrent Multipath Transfer (CMT) have been demonstrated to be very useful for data delivery over multi-homed wireless networks. However, there is still significant ongoing work addressing some remaining limitations and challenges. The most important concern when applying CMT to data delivery is related to handling packet reordering and buffer blocking. Another concern on this topic is that current sender-based CMT solutions seldom consider balancing the overhead and sharing the load between the sender and receiver. This paper proposes a novel Receiver-driven Cooperation-based Concurrent Multipath Transfer solution (CMT-Rev) with the following aims: (i) to balance overhead and share load between the sender and receiver, by moving some functions including congestion and flow control from the sender onto receiver; (ii) to mitigate the data reordering and buffer blocking problems, by using an adaptive receiver-cooperative path aggregation model, (iii) to adaptively transmit packets over multiple paths according to their receiver-inspired sending rate values, by employing a new receiver-aware data distribution scheduler. Simulation results show that CMT-Rev outperforms the existing CMT solutions in terms of data delivery performance.

• 대한전자공학회논문지SD
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• 제42권12호
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• pp.91-102
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• 2005

최근의 저 전력 컴퓨터 시스템은 내장 프로세서의 성능 향상과 공정 기술의 발전을 통한 디바이스 크기 감소로 인해 전압 변동, 커플링 효과 등으로 인한 SEU(single event upset)로 모델링 되는 천이고장으로 인한 예기치 못한 동작 중 에러 발생가능성이 매우 높아지고 있다. 제안하는 방식은 프로세서가 처리하는 프로그램 분기 흐름상에서 에러를 검출하는 효과적인 watchdog 프로세서 구조로서, 기존 방식이 가지는 오버헤드를 줄이면서 프로그램 내부에서 빈번히 발생되는 루프를 매번 검사할 때, 동일한 동작을 watchdog 프로세서가 반복함으로써 생기는 비효율적인 메모리 접근, 버스 점유 경쟁등과 같은 추가적인 시스템 수준의 오버헤드를 줄이는 새로운 방법을 제안하였다. 본 논문은 기존의 실시간 분기 및 제어 흐름 연구에서는 다루지 않았던 루프 검출 및 예측 기능을 추가함으로써 실제 시스템 적용에 보다 적합한 비용 효율적인 구조를 제안하고 있다.

• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 2005년도 춘계학술대회 논문집
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• pp.987-992
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• 2005

Manufacturing companies should perform process planning and its evaluation concurrently with new product developments so that they can be highly competitive in the modern market. Process planners should make decisions in the manner of concurrent and collaborative engineering in order to reduce the manufacturing preparation time and cost when developing new products. Automated generation of analysis models from the integrated database, which contains process and material information, reduces time to prepare analyses and makes the models reliable. In this research, we developed a web-based system for concurrent and collaborative system for production flow analysis, using web, database, and simulation technology. An integrated database is designed to automatically generate analysis models from process and material plans without reworking the data. This system enables process planners to evaluate their decision fast and share their opinions with others easily. With this system, it is possible to save time and cost for assembly process and material planning, and reliability of process plans can be improved

• KSII Transactions on Internet and Information Systems (TIIS)
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• 제11권6호
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• pp.2870-2888
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• 2017

Recent studies have shown that the flow table size of hardware SDN switch cannot match the number of concurrent flows. Combined SDN Forwarding Element (CFE), which comprises several software switches and a hardware switch, becomes an alternative approach to tackle this problem. Due to the limited capacity of software switch, the way to route concurrent flows in CFE can largely affect the maximum delay that a flow suffers at CFE. As delay-guarantee is a nontrivial task for network providers with the increasing number of delay-sensitive applications, we propose an analytical model of CFE to evaluate a rules placement solution first. Next, we formulate the problem of Rules Placement with delay guarantee in CFE (RPCFE), and present the genetic-based rules placement (GARP) algorithm to solve the RPCFE problem. Further, we validate the analytical model of CFE through simulations in NS-3 and compare the performance of GARP with three benchmark algorithms.

• 한국정보처리학회:학술대회논문집
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• 한국정보처리학회 2014년도 추계학술발표대회
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• pp.234-237
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• 2014

This paper provides insights into the sFlow monitoring system of OF@KREONET. OF@KREONET is software defined network (SDN) testbed adapted by KREONET (Korea Research Environment Open NETwork). OF@KREONET uses SDN-based network virtualization to slice the network among multiple concurrent experimenter. Flow Monitoring of OF@KREONET using sFlow. sFlow and OpenFlow can be used to provide an integrated flow monitoring system where OpenFlow controller can be used to define flows to be monitored by sFlow. OF@KREONET flow monitoring system supports monitoring of per slice FlowSpace. An Experimental can monitor his/her own FlowSpace while network administrator can monitor all spaces.

• 전자공학회논문지A
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• 제31A권5호
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• pp.149-157
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• 1994

This paper Presents an algorithm for synthesis of sequential statements described at RT level VHDL. The proposed algorithm transforms sequential statements in VHDL into data-flow description consisting of concurrent statements by local and global dependency analysis and output dependency elimination. Transformation into concurrent statements makes it possible to reduce the cost of the synthesized hardwares, thus to get optimal synthesis results that will befit the designer 's intention. This algorithm has been implemented on VSYN and experimental results show that more compact gate-level hardwares are generated compared with Power View system from ViewLogic and Design Analyzer from Synopsys.

• 한국정보과학회:학술대회논문집
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• 한국정보과학회 1998년도 가을 학술발표논문집 Vol.25 No.2 (1)
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• pp.463-465
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• 1998

COncurrent Design Approach for Real-Time System(이하 COSATRS) 방법론은 Gomaa가 제안한 실시간 설계 방법론으로서 Real-Time Structured Analysis(이하 RTSA)또는 Concurrent Object-Based Real-Time Analysis(이하 COBRA)방법론을 이용하여 Control and Data Flow Diagram(이하 C&DFD)를 구성하고 이것에 병렬 태스크 구조화 지침, 정보 은닉 모듈 구조화 지침을 적용하여 Task Architecture Diagram (이하 TDA), Information Hiding Module(이하 IHM)을 구성하고 나서 이 둘을 결합하여 Software Architecture Diagram(이하 SAD)를 구성하게 된다. 본 논문에서는 CODARTS 방법론의 적용과정을 테이블을 구성하여 적용함으로써 실시간 S/W 설계 지원 시스템을 설계하였다.

• 대한전기학회논문지
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• 제34권8호
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• pp.301-307
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• 1985

The first four generations of computers are all based on a single basic design: the Von Neuman Processor, which is sequential and does one operation at a time. Efforts to develop concurrent or parallel computers have been carried on for many years. Data flow approach is significant in these efforts to make high speed parallel machines and expected a great deal of parallelism. In this paper we propose a preliminary data Flow Machine Model operating asynchronously on the base of Node Labelling. We introduce a concept of Node Labeling for this purpose which is relevant to the Data dependency and Parallelism. And we explain how the Node Tokens are fired in the proposed system.