• International conference on construction engineering and project management
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• 2007.03a
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• pp.520-529
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• 2007

Apportioning responsibilities of concurrent delay to the owner and the contractor is a difficult task, due to the sophisticate nature both in the schedule and in the factors that cause the delay. This research attempts to develop a simplified yet systematic approach that can be used for a fair apportionment of concurrent delay. A concurrent delay is defined herein as when the contractor and the owner have both caused independent critical path delays during the same approximate time period. Incorporating the concepts of windows analysis and critical path method (CPM), the developed approach has three "windowing of delay" steps to quickly apportion the delay in each of these windows, and a fourth step to sum up those apportioned delays to obtain each party's final responsibilities. This developed approach is found to be simple and effective at this stage; it will be tested against real cases in the near future.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.63 no.2
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• pp.81-88
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• 2014

In this paper, an implementation of concurrent backoff delay process on a single chip with IEEE 802.15.4 hardware and 8051 processor core that can be used for analyzing the interference on IEEE 802.15.4 channels due to WiFi traffics is studied. The backoff delay process of IEEE 802.15.4 CSMA-CA algorithm is explained. The characteristics of random number generator, timer, and CCA register included in the single chip are described with their control procedure in order to implement the process. A concurrent backoff delay process to evaluate multiple IEEE 802.15.4 channels is proposed, and a method to service the associated tasks at sequentially ordered backoff delay events occurring on the channels is explained. For the implementation of the concurrent backoff delay process on a single chip IEEE 802.15.4 hardware, the elements for the single channel backoff delay process and their control procedure are used to be extended to multiple channels with little modification. The medium access delay on each channel, which is available after execution of the concurrent backoff delay process, is displayed on the LCD of an IEEE 802.15.4 channel analyzer. The experimental results show that we can easily identify the interference on IEEE 802.15.4 channels caused by WiFi traffics in comparison with the way displaying measured channel powers.

• Proceedings of the Korean Institute Of Construction Engineering and Management
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• autumn
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• pp.438-441
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• 2003

Construction delays are a common occurrence of most construction projects and difficult to analyze. there are some techniques to analyze delays, such as using CPM, Bar Chart but they are not enough to analyze concurrent and productivity lost delays. Productivity lost delays are different to interruption delays in computing the number of delays and analyzing concurrent delay. This paper describes the delay analysis method considering productivity including concurrent delay analysis.

• Proceedings of the Korean Institute of Building Construction Conference
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• 2015.11a
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• pp.68-69
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• 2015

Traditional External Insulation Finishing System(EIFS) is applied to apartment construction by performing structural framework and insulation finishing work sequentially. Separate execution of the three works increases construction cost and duration. Concurrent construction method of EIFS, which performs framework and insulation finishing work simultaneously, is introduced in order to solve these problems. However, the introduced method is exposed to the risk of construction delay caused by bottlenecks due to interacting processes and resources. Therefore, this paper presents a simulation model suitable for estimating work productivity of the concurrent construction by considering predecessor and successor processes to optimize resource allocation and minimize construction delay.

• The Transactions of the Korean Institute of Electrical Engineers A
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• v.48 no.10
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• pp.1344-1348
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• 1999

This paper proposes concurrent event propagation technique for timing analysis. The technique makes it possible to find several input vectors and sensitizable paths at the same time. The concurrent event propagation technique is based on the event driven simulation and the timing analysis technique with boolean equations. The technique propagates as many events as possible at the same time while preventing propagation of boolean terms which do not sensitize paths. Since events do not propagate through false paths, the longest path which successfully propagates events to one of the primary outputs is one of the longest sensitizable paths. The technique can speed up timing analysis by unifying path sensitization and maximum delay calculation.

• The Transactions of the Korea Information Processing Society
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• v.5 no.11
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• pp.2989-2996
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• 1998

As the circuit density of VLSI grows and its performance improves, delay fault testing of VLSI becomes very important. Delay faults in a circuit can be categorized into two classes, gate delay faults and path delay faults. This paper proposed two methods in dynamic memory usage in the path delay fault simulation. The first method is similar to that used in concurrent fault simulation for stuck-at faults and the second method reduces dynamic memory usage by not inserting a fault descriptor into the fault list when its value is X. The second method, called Implicit-X method, showed superior performance in both dynamic memory usage and simulation time than the first method, called Concurrent-Simulation-Like method.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.11 no.6
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• pp.2870-2888
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• 2017

Recent studies have shown that the flow table size of hardware SDN switch cannot match the number of concurrent flows. Combined SDN Forwarding Element (CFE), which comprises several software switches and a hardware switch, becomes an alternative approach to tackle this problem. Due to the limited capacity of software switch, the way to route concurrent flows in CFE can largely affect the maximum delay that a flow suffers at CFE. As delay-guarantee is a nontrivial task for network providers with the increasing number of delay-sensitive applications, we propose an analytical model of CFE to evaluate a rules placement solution first. Next, we formulate the problem of Rules Placement with delay guarantee in CFE (RPCFE), and present the genetic-based rules placement (GARP) algorithm to solve the RPCFE problem. Further, we validate the analytical model of CFE through simulations in NS-3 and compare the performance of GARP with three benchmark algorithms.

• Korean Journal of Construction Engineering and Management
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• v.24 no.1
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• pp.12-20
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• 2023

To calculate the amount of owner-caused and contractor-caused delays based on a simplified delay analysis, which has been customarily used in Korea, has a limitation in reflecting the impact of the concurrent delay and the acceleration work. It also resulted in the apportionment of liquidated damages by applying the ratio of the number of delays between the owner and the contractor. This study analyzes that the conventional method does not meet the international standards. In order to improve the problem of construction delay analysis and the apportionment of liquidated damages based on it, owner delays, contractor delays, concurrent delays, and the impact of acceleration should be analyzed together. This study suggests that in the apportionment of liquidated damages, the extension of time should be extended by the sum of concurrent delays and the owner-caused delays, and liquidated damages should be imposed on delays incurred after the extension of time. It can be seen that it conforms to the international standards. The results of this study are expected to contribute to improving the problems of delay analysis and liquidated damages calculation, which have been conventionally accepted.

• Journal of the Korean Academy of Child and Adolescent Psychiatry
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• v.33 no.1
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• pp.16-23
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• 2022

Objectives: Early detection of developmental issues in infants and necessary intervention are important. To identify the comorbid conditions, a comprehensive evaluation is required. The study's objectives were to 1) generate scale items by identifying and eliciting concepts relevant to young children (12-71 months) with developmental delays, 2) develop a comprehensive screening tool for developmental delay and comorbid conditions, and 3) assess the tool's validity and cut-off. Methods: Multidisciplinary experts devised the "Infant Comprehensive Evaluation for Neurodevelopmental Delay (ICEND)," an assessment method that comes in two versions depending on the age of the child: 12-36 months and 37-71 months, through monthly seminars and focused group interviews. The ICEND is composed of three parts: risk factors, resilience factors, and clinical scales. In parts 1 and 2, there were 41 caretakers responded to the questionnaires. Part 3 involved clinicians evaluating ten subscales using 98 and 114 questionnaires for younger and older versions, respectively. The Child Behavior Checklist, Strengths and Difficulties Questionnaire, Infant-Toddler Social Emotional Assessment, and Korean Developmental Screening Test for Infants and Children were employed to analyze concurrent validity with the ICEND. The analyses were performed on both typical and high-risk infants to identify concurrent validity, reliability, and cut-off scores. Results: A total of 296 people participated in the study, with 57 of them being high-risk (19.2%). The Cronbach's alpha was positive (0.533-0.928). In the majority of domains, the ICEND demonstrated a fair discriminatory ability, with a sensitivity of 0.5-0.7 and specificity 0.7-0.9. Conclusion: The ICEND is reliable and valid, indicating its potential as an auxiliary tool for assessing neurodevelopmental delay and comorbid conditions in children aged 12-36 months and 37-71 months.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.8 no.3
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• pp.778-798
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• 2014

This paper proposes a novel exposed-terminal-eliminated medium access control (ETE-MAC) protocol by combining channel reservation, collision avoidance and concurrent transmissions to improve multi-access performance of the multihop wireless networks. Based on the proposed slot scheduling scheme, each node senses the control channel (CCH) or the data channel (DCH) to accurately determine whether it can send or receive the corresponding packets without collisions. Slot reservation on the CCH can be simultaneously executed with data packet transmissions on the DCH. Therefore, it resolves the hidden-terminal type and the exposed-terminal type problems efficiently, and obtains more spatial reuse of channel resources. Concurrent packet transmissions without extra network overheads are maximized. An analytical model combining Markov model and M/G/1 queuing theory is proposed to analyze its performance. The performance comparison between analysis and simulation shows that the analytical model is highly accurate. Finally, simulation results show that, the proposed protocol obviously outperforms the link-directionality-based dual-channel MAC protocol (DCP) and WiFlex in terms of the network throughput and the average packet delay.