• Title/Summary/Keyword: Computer generated hologram

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Improving the quality of light-field data extracted from a hologram using deep learning

  • Dae-youl Park;Joongki Park
    • ETRI Journal
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    • v.46 no.2
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    • pp.165-174
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    • 2024
  • We propose a method to suppress the speckle noise and blur effects of the light field extracted from a hologram using a deep-learning technique. The light field can be extracted by bandpass filtering in the hologram's frequency domain. The extracted light field has reduced spatial resolution owing to the limited passband size of the bandpass filter and the blurring that occurs when the object is far from the hologram plane and also contains speckle noise caused by the random phase distribution of the three-dimensional object surface. These limitations degrade the reconstruction quality of the hologram resynthesized using the extracted light field. In the proposed method, a deep-learning model based on a generative adversarial network is designed to suppress speckle noise and blurring, resulting in improved quality of the light field extracted from the hologram. The model is trained using pairs of original two-dimensional images and their corresponding light-field data extracted from the complex field generated by the images. Validation of the proposed method is performed using light-field data extracted from holograms of objects with single and multiple depths and mesh-based computer-generated holograms.

Fast Generation of Digital Hologram Based on Multi-GPU (Multi-GPU 기반의 고속 디지털 홀로그램 생성)

  • Song, Joong-Seok;Park, Jung-Sik;Seo, Young-Ho;Park, Jong-Il
    • Journal of Broadcast Engineering
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    • v.16 no.6
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    • pp.1009-1017
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    • 2011
  • Fast generation of digital hologram is of importance for real-time holography broadcasting. In this paper, we propose such a method that parallelizes the Computer-Generated Holography (CGH) algorithm for digital hologram generation and make it faster using Multi Graphic Processing Unit (Multi-GPU) with help of the Compute Unified Device Architecture (CUDA) and the Open Multi-Processing (OpenMP). In addition, we propose optimization methods such as fixation variable, vectorization, and loop unrolling for making the CGH algorithm much faster. Experimental results show that our method is about 9,700 times faster than a CPU-based one.

Compression Method for Digital Hologram using Motion Prediction Method in Frequency-domain (주파수 영역에서 움직임 예측을 이용한 디지털 홀로그램 압축 기법)

  • Choi, Hyun-Jun;Bae, Yun-Jin;Seo, Young-Ho;Kang, Chang-Soo;Kim, Dong-Wook
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.14 no.9
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    • pp.2091-2098
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    • 2010
  • This paper proposes a hologram data compression scheme that uses the existing image/video compression techniques, in which the existing techniques are modified appropriately to fit to the characteristics of hologram. In this paper we use CGH as the hologram data. The proposed scheme uses the generation characteristics of a CGH to consist of a pre-processing, spatial segmentation of a CGH, frequency-transformation with 2D-DCT (2-dimensional discrete cosine transform), and motion estimation and residual image generation in the frequency-domain. It uses H.264/AVC, the lossless compressor BinHex, and a linear quantizer that we have made. From the experiments the proposed scheme showed the image quality of about 25.4 dB at the compression ratio of 10:1 and about 16.5dB at 90:1 compression ratio.

Improvement of the efficiency from Computer-Generated Holograms by using TS algorithm and SA algorithm (TS 알고리듬과 SA 알고리듬을 이용한 컴퓨터 형성 홀로그램의 성능 향상)

  • Cho, Chang-Sub;Shin, Chang-Mok;Cho, Kyu-Bo;Kim, Soo-Joong;Kim, Cheol-Su
    • Korean Journal of Optics and Photonics
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    • v.16 no.1
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    • pp.43-49
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    • 2005
  • In this paper, we propose a method for optimizing a computer-generated hologram(CGH) by combining the Tabu Search(TS) algorithm with the Simulated Annealing(SA) algorithm. By replacing an initial random pattern of the SA algorithm with an approximately ideal hologram pattern of the TS algorithm, we design a CGH which has high diffraction efficiency(DE). We compared the performance of the proposed algorithm with the SA algorithm using computer simulation and an optical experiment. As a result, we confirmed diffraction efficiency and uniformity to be enhanced in the proposed algorithm.

A New System Implementation for Generating Holographic Video using Natural Color Scene (실사 컬러 영상을 이용한 홀로그램 비디오 생성 시스템 구현)

  • Seo, Youngho;Lee, Yoon-Hyuk;Koo, Ja-Myung;Kim, Woo-Youl;Kim, Bo-Ra;Kim, Dong-Wook
    • Journal of Broadcast Engineering
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    • v.18 no.2
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    • pp.149-158
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    • 2013
  • In this paper, we propose a new system which can generate digital holograms for natural color scene. The system consists of both a camera system for capturing images and softwares(SWs) for various image processings. The camera system uses a vertical rig with a depth and a RGB camera and a cold mirror which has the different transmittance according to wavelength for obtaining images with the same view point. The S/W is composed by the engines for processing and servicing the captured images and computer-generated hologram (CGH) for generating digital holograms using general-purpose computing on graphics processing unit (GPGPU). Each algorithm was implemented using C/C++ and CUDA languages, and all engines were integrated in LabView environment. The proposed system can generate 10 digital holographic frames per second using about 6K light sources.

Digital Image Watermarking Technique using Scrambled Binary Phase Computer Generated Hologram in Discrete Cosine Transform Domain (DCT영역에서 스크램블된 이진 위상 컴퓨터형성홀로그램을 이용한 디지털 영상 워터마킹 기술)

  • Kim, Cheol-Su
    • Journal of Korea Multimedia Society
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    • v.14 no.3
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    • pp.403-413
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    • 2011
  • In this paper, we proposed a digital image watermarking technique using scrambled binary phase computer generated hologram in the discrete cosine transform(DCT) domain. For the embedding process of watermark. Using simulated annealing algorithm, we would generate a binary phase computer generated hologram(BPCGH) which can reconstruct hidden image perfectly instead of hidden image and encrypt it through the scramble operation. We multiply the encrypted watermark by the weight function and embed it into the DC coefficients in the DCT domain of host image and an inverse DCT is performed. For the extracting process of watermark, we compare the DC coefficients of watermarked image and original host image in the DCT domain and dividing it by the weight function and decrypt it using descramble operation. And we recover the hidden image by inverse Fourier transforming the decrypted watermark. Finally, we compute the correlation between the original hidden image and recovered hidden image to determine if a watermark exits in the host image. The proposed watermarking technique use the hologram information of hidden image which consist of binary values and scramble encryption technique so it is very secure and robust to the various external attacks such as compression, noises and cropping. We confirmed the advantages of the proposed watermarking technique through the computer simulations.

A New ASIC Design of Digital Hologram Generation Circuit for 12×12 Block (12×12 블록의 디지털 홀로그램 생성 회로의 ASIC 설계)

  • Lee, Yoon-Hyuk;Kim, Dong-Wook;Seo, Young-Ho
    • Journal of Broadcast Engineering
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    • v.21 no.6
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    • pp.944-956
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    • 2016
  • In this paper, we propose a new hardware architecture to generate computer-generated holograms based on the block based calculation method and implement a VLSI (very large scaled integrated circuit) in ASIC (application specific integrated circuit) environment. The proposed hardware has a structure that can produce a part of a hologram in the unit of a block in parallel. After calculating a block of a hologram by using an object point, the calculation is repeated to all object points and intermediate results from them are accumulated to produce a final block of a hologram. Through this structure, we can make various size of holograms with the optimized memory access in real-time operation. The proposed hardware was implemented in the Hynix 0.18um CMOS technology of Magna chip Inc. and has 876,608 gate counts. It can generate complex holograms unlike the previous researches and stably operate in the clock frequency of 200MHz.

FImplementation of RF Controller based on Digital System for TRS Repeater (실시간 디지털 홀로그래피를 위한 고성능 CGH프로세서)

  • Seo, Young-Ho;Choi, Hyun-Jun;Kim, Dong-Wook
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.11 no.8
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    • pp.1424-1433
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    • 2007
  • In this paper, we propose a hardware architecture to generate digital hologram using the modified CGH (Computer Generated Hologram) algorithm for hardware implementation and design to FPGA (Field Programmable Gate Array) platform. After analyzing the CGH algorithm, we propose an architecture of CGH cell which efficiently products digital hologram, and design CGH Kernel from configuring CGH Cell. Finally we implement CGH Processor using CGH Kernel, SDRAM Controller, DMA, etc. Performance of the proposed hardware can be proportionally increased through simply addition of CGH Cell in CGH Kernel, since a CGH Cell has operational independency. The proposed hardware was implemented using XC2VP70 FPGA of Xilinx and was stably operated in 200MHz clock frequency. It take 0.205 second for generating $1,280{\times}1,024$ digital hologram from 3 dimensional object which has 40,000 light sources.