• International Journal of Internet, Broadcasting and Communication
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• v.8 no.1
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• pp.42-52
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• 2016

In this paper, we propose the 16-bits optimization design of the ARIA block-cipher algorithm for embedded systems with 16-bits processors. The proposed design adopts 16-bits XOR operations and rotated shift operations as many as possible. Also, the proposed design extends 8-bits array variables into 16-bits array variables for faster chained matrix multiplication. In evaluation experiments, our design is compared to the previous 32-bits optimized design and 8-bits optimized design. Our 16-bits optimized design yields about 20% faster execution speed and about 28% smaller footprint than 32-bits optimized code. Also, our design yields about 91% faster execution speed with larger footprint than 8-bits optimized code.

• The KIPS Transactions:PartA
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• v.14A no.3 s.107
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• pp.167-172
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• 2007

VM(Virtual Machine) can be considered as a software processor which interprets the machine code. Also, it is considered as a conceptional computer that consists of logical system configuration. But, the execution speed of VM system is much slower than that of a real processor system. So, it is very important to optimize the code for virtual machine to enhance the execution time. Especially the optimizer for a virtual machine code on embedded devices requires the highly efficient performance to the ordinary optimizer in the respect to the optimized ratio about cost. Fundamentally, functions and basic blocks which influence the execution time of virtual machine is found, and then an optimization for them nay get the high efficiency. In this paper, we designed and implemented the optimizer for the virtual(or abstract) machine code(VMC) using profiling. Firstly, we defined the profiling information which is necessary to the optimization of VMC. The information can be obtained from dynamically executing the machine code. And we implemented VMC optimizer using the profiling information. In our implementation, the VMC is SIL(Standard Intermediate Language) that is an intermediate code of EVM(Embedded Virtual Machine). Also, we tried a benchmark test for the VMC optimizer and obtained reasonable results.

• Proceedings of the Korea Information Processing Society Conference
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• 2003.11a
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• pp.321-324
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• 2003

본 논문에서는 코드 최적화를 위하여 계산적으로나 수명적으로 제한이 없는 희소 코드 모션 알고리즘을 제안한다. 이 알고리즘은 지나친 레지스터의 사용을 막기 위하여 불필요한 코드 모션을 억제한다. 또한, 본 논문에서는 기존 알고리즘의 술어의 의미가 명확하지 않은 것을 개선하였고 노드 단위 분석과 명령어 단위 분석을 혼용했기 때문에 발생하는 모호함도 개선하였다. 따라서, 제안한 알고리즘은 불필요하게 중복된 수식이나 배정문의 수행을 피하게 함으로써, 프로그램의 불필요한 재계산이나 재실행을 하지 않게 하여 프로그램의 능률 및 실행시간을 향상시킨다.

• Journal of Digital Convergence
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• v.15 no.3
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• pp.181-186
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• 2017

The system optimization is a technique that changes the structure of the program in order to extract the duplicated modules without changing the source code, reuse of the extracted module. Structure-oriented development and object-oriented development are efficient at crosscutting concern modular, however can't be modular of crosscutting concept. To apply the crosscutting concept in an existing system, there is a need to a extracting technique for distributed system optimization module within the system. This paper proposes a method for extracting the redundant modules in the completed system. The proposed method extracts elements that overlap over a source code analysis to analyze the data dependency and control dependency. The extracted redundant element is used to program dependency analysis for the system optimization. Duplicated dependency analysis result is converted into a control flow graph, it is possible to produce a minimum crosscutting module. The element extracted by dependency analysis proposes a system optimization method which minimizes the duplicated code within system by setting the crosscutting concern module.

• Korean Management Science Review
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• v.11 no.3
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• pp.35-46
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• 1994

The primal-dual log barrier code OB1(Optimization with Barriers 1) has been identified the most efficient one in reducing computer time and solving large linear programs. This is a brief survey of OB1's life-time and performance.

• IEIE Transactions on Smart Processing and Computing
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• v.4 no.3
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• pp.169-172
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• 2015

Dalvik is a virtual machine (VM) that is designed to run Java-based Android applications. A trace-based just-in-time (JIT) compilation technique is currently employed to improve performance of the Dalvik VM. However, due to runtime compilation overhead, the trace-based JIT compiler provides only a few simple optimizations. Moreover, because each trace contains only a few instructions, the trace-based JIT compiler inherently exploits fewer optimization and parallelization opportunities than a method-based JIT compiler that compiles method-by-method. So we propose a new method-based JIT compiler, named DEX2C, in order to improve performance by finding more opportunities for both optimization and parallelization in Android applications. We employ C code as an intermediate product in order to find more optimization opportunities by using the GNU C Compiler (GCC), and we will detect parallelism by using the Intel C/C++ parallel compiler and the AESOP compiler in our future work. In this paper, we introduce our DEX2C compiler, which dynamically translates Dalvik bytecodes (DEX) into C code with method granularity. We also describe a new method-based JIT interface in the Dalvik VM for the DEX2C compiler. Our experiment results show that our compiler and its interface achieve significant performance improvement by up to 15.2 times and 3.7 times on average, in Element Benchmark, and up to 2.8 times for FFT in Smartbench.

• JSTS:Journal of Semiconductor Technology and Science
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• v.6 no.4
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• pp.234-239
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• 2006

In the past decade, several tools have been developed to automate the floating-point to fixed-point conversion for DSP systems. In the conversion process, a number of scaling shifts are introduced, and they inevitably alter the original code sequence. Recently, we have observed that a compiler can often be adversely affected by this alteration, and consequently fails to generate efficient machine code for its target processor. In this paper, we present an optimization technique that safely migrates scaling shifts to other places within the code so that the compiler can produce better-quality code. We consider our technique to be safe in that it does not introduce new overflows, yet preserving the original SQNR. The experiments on a commercial fixed-point DSP processor exhibit that our technique is effective enough to achieve tangible improvement on code size and speed for a set of benchmarks.

• Journal of the Korea Society of Computer and Information
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• v.5 no.3
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• pp.1-8
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• 2000

Prepass code scheduling(code scheduling before register allocation), the register lifetimes may be lengthened, which may increase the amount of data dependence relations. So, it makes difficult to allocate the registers because of complex interference graph. In this paper, to improve that defect, propose an 2-phase coloring method. At first phase-1 assign the registers to variables which have long live ranges. Secondly, phase-2 allocate the registers to remained variables to minimize the register allocation cost. Experimental results shown that proposed method is more efficient scheme than Chaitin's scheme when prepass code scheduling.

• Nuclear Engineering and Technology
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• v.42 no.4
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• pp.460-467
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• 2010

In this study, the parameters of the feedwater control system (FWCS) of the OPR1000 type nuclear power plant (NPP) are optimized by response surface methodology (RSM) in order to acquire better level control performance from the FWCS. The objective of the optimization is to minimize the steam generator (SG) water level deviation from the reference level during transients. The objective functions for this optimization are relationships between the SG level deviation and the parameters of the FWCS. However, in this case of FWCS parameter optimization, the objective functions are not available in the form of analytic equations and the responses (the SG level at plant transients) to inputs (FWCS parameters) can be evaluated by computer simulations only. Classical optimization methods cannot be used because the objective function value cannot be calculated directely. Therefore, the simulation optimization methodology is used and the RSM is adopted as the simulation optimization algorithm. Objective functions are evaluated with several typical transients in NPPs using a system simulation computer code that has been utilized for the system performance analysis of actual NPPs. The results show that the optimized parameters have better SG level control performance. The degree of the SG level deviation from the reference level during transients is minimized and consequently the control performance of the FWCS is remarkably improved.

• Journal of the Computational Structural Engineering Institute of Korea
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• v.24 no.1
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• pp.61-67
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• 2011

This study is concerned with the shape optimization of structural members frequently found in critical area in a structure system, that is, highly stressed zone. Isogeometry analysis is well known to be the very efficient way to integrate the geometric modeling(CAD) and computational analysis(CAE). This can be accomplished by directly using the geometric modeling by NURBS(Non-Uniform Rational Basis Spline). In this study, an efficient computer code adopting the isogeometry concept has been developed for the structural analysis, in which CAD information can be directly used in the finite element modeling. In order to show the validity of the present code, the present results are compared with those by using the commercial package, that is, MSC/NASTRAN. The present isogeometric analysis procedure has been integrated with the optimization procedure to deal with the optimization problem found in the context of structural mechanics. The present system has been successfully applied to the shape optimization of cantilever structure having bracket. From the present study, it can be seen the validity of the present approach and computer codes developed in this study. This paper ends with some discussions about the practical usefulness of the present approach which is based on isogeometry analysis, and extension of the present study.