Browse > Article

A Rule-based Optimal Placement of Scaling Shifts in Floating-point to Fixed-point Conversion for a Fixed-point Processor  

Park, Sang-Hyun (Software Optimizations and Restructuring Group School of Electrical Engineering and Computer Science Seoul National University)
Cho, Doo-San (Software Optimizations and Restructuring Group School of Electrical Engineering and Computer Science Seoul National University)
Kim, Tae-Song (Software Optimizations and Restructuring Group School of Electrical Engineering and Computer Science Seoul National University)
Paek, Yun-Heung (Software Optimizations and Restructuring Group School of Electrical Engineering and Computer Science Seoul National University)
Publication Information
JSTS:Journal of Semiconductor Technology and Science / v.6, no.4, 2006 , pp. 234-239 More about this Journal
Abstract
In the past decade, several tools have been developed to automate the floating-point to fixed-point conversion for DSP systems. In the conversion process, a number of scaling shifts are introduced, and they inevitably alter the original code sequence. Recently, we have observed that a compiler can often be adversely affected by this alteration, and consequently fails to generate efficient machine code for its target processor. In this paper, we present an optimization technique that safely migrates scaling shifts to other places within the code so that the compiler can produce better-quality code. We consider our technique to be safe in that it does not introduce new overflows, yet preserving the original SQNR. The experiments on a commercial fixed-point DSP processor exhibit that our technique is effective enough to achieve tangible improvement on code size and speed for a set of benchmarks.
Keywords
Compiler; Conversion; Floating-point; Fixed-point; DSP;
Citations & Related Records
연도 인용수 순위
  • Reference
1 S. Muchinick, Advanced Compiler Design & Implementation, Morgan Kaufmann, 1997
2 M. Ahn and Y. Paek, 'A New ADL-based Compiler for Embedded Processor Design,' Technical Report, SO&R Research Group, Seoul National University, 2005
3 A. Chandrakasan, et. al., 'Optimizing Power Using Transformations,' IEEE Transactions on CAD, Vol. 14, No. 1, 12?31, 1995   DOI   ScienceOn
4 C. Shi and R. Brodersen, 'Automated Fixed-point Data-type Optimization Tool for Signal Processing and Communication Systems,' In Design Automation Conference, 2000   DOI
5 P. Lapsely, J. Bier, A. Shoham and E. Lee, 'DSP Processor Fundamentals: Architectures and Features,' IEEE Press 1997
6 H. Keding, M. Willems, M. Coors, and H. Meyr, 'FRIDGE: A Fixed-Point Design And Simulation Environment,' Design, Automation and Test in Europe, 1998   DOI
7 ZSP 400 Digital Signal Processor Technical Manual, http://www.zsp.com
8 S. Kim, K. Kum, and S. Wonyong, 'Fixed-Point Optimization Utility for C and C++ Based Digital Signal Processing Programs,' IEEE Transactions on Circuits and Systems II, 45(11), November 1998   DOI   ScienceOn
9 T. Grotker, E. Multhaup, and O.Mauss, 'Evaluation of HW/SW Tradeoffs Using Behavioral Synthesis,' ICSPAT'96, Boston, October 1996