• 한국정보통신학회논문지
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• 제14권7호
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• pp.1589-1596
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• 2010

본 논문에서는 CBP(coded block pattern) 및 colocated-MB(macro block)의 부호화 정보를 이용하여 인터모드 결정에 소요되는 계산량을 감소시키는 방법을 제안한다. 제안한 방법은 MB를 CBP 특성에 따라 best-CBP와 normal-CBP 로 나눈다. Best-CBP에서는 SKIP 모드 및 M-Type 모드일 확률이 통계적으로 96.3%이므로 인터모드 결정 과정에서 $8{\times}8$ 모드 계산을 제거한다. Normal-CBP에서는 SKIP 모드 및 M-Type 모드 결정에 colocated-MB의 부호화 정보와 MVcost(motion vector cost)를 이용하여 비트율-왜곡 치에 소요되는 계산량을 선택적으로 제거한다. 실험 결과, 제안한 방법은 전체 부호화 시간이 평균적으로 58.44% 감소되었으며, 움직임이 적은 영상에서 계산량 감소 효과가 우수함을 알 수 있었다.

• 한국정보통신학회:학술대회논문집
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• 한국정보통신학회 2022년도 춘계학술대회
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• pp.115-117
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• 2022

화이트박스 암호 기법은 암호 키 정보를 소프트웨어 기반 암호화 알고리즘에 섞어 암호 키의 노출을 막는 방식이다. 화이트박스 암호 기법은 허가되지 않은 역공학 분석으로 메모리에 접근하여 기밀 데이터와 키를 유추하기 어렵게 만들어서 종래의 하드웨어 기반의 보안 암호화 기법을 대체하는 기술로 주목받고 있다. 하지만, 암복호화 과정에서 연산 결과와 암호 키를 숨기기 위해 크기가 큰 룩업테이블을 사용하기 때문에 암복호 속도가 느리고, 메모리 사이즈가 커지는 문제가 발생한다. 특히 최근 저가, 저전력, 경량의 사물인터넷 제품들은 제한된 메모리 공간과 배터리 용량 때문에 화이트박스 암호을 적용하기 어렵다. 또한, 실시간 서비스를 지원해야 하는 네트워크 환경에서는 화이트박스 암호의 암복호화 속도로 인해 응답 지연 시간이 증가하여 통신 효율이 열화된다. 따라서 본 논문에서는 S.Chow가 제안한 AES 기반 화이트박스(WBC-AES)를 사용하여 속도와 메모리 요구조건을 만족할 수 있는지 실험 결과를 토대로 분석한다.

• Journal of Mechanical Science and Technology
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• 제18권4호
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• pp.718-730
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• 2004

The solution for the natural convection in internally finned horizontal annuli is obtained by using a numerical simulation of time-dependent and two-dimensional governing equations. The fins existing in annuli influence the flow pattern, temperature distribution and heat transfer rate. The variations of the On configuration suppress or accelerate the free convective effects compared to those of the smooth tubes. The effects of fin configuration, number of fins and ratio of annulus gap width to the inner cylinder radius on the fluid flow and heat transfer in annuli are demonstrated by the distribution of the velocity vector, isotherms and streamlines. The governing equations are solved efficiently by using a parallel implementation. The technique is adopted for reduction of the computation cost. The parallelization is performed with the domain decomposition technique and message passing between sub-domains on the basis of the MPI library. The results from parallel computation reveal in consistency with those of the sequential program. Moreover, the speed-up ratio shows linearity with the number of processor.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2005년도 학술대회 논문집 정보 및 제어부문
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• pp.143-145
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• 2005

In this paper, an empirical study result on pattern estimation method is devoted to reveal underlying data patterns with a relatively reduced computational cost. Presented method performs crisp type clustering with given n number of data samples by means of the sequential agglomerative hierarchical nested model (SAHN). Conventional SAHN based clustering requires large computation time in the initial step of algorithm. To deal with this concern, we modified overall process with a partial approach. In the beginning of this method, we divide given data set to several sub groups with uniform sampling and then each divided sub data group is applied to SAHN based method. The advantage of this method reduces computation time of original process and gives similar results. Proposed is applied to several test data set and simulation result with conceptual analysis is presented.

• 전자공학회논문지C
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• 제35C권1호
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• pp.15-24
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• 1998

This paper proposes a new template matching algorithm and its chip design. The CC and SAD algorithms require the massive amount of computation. Hence, several algorithms using quantization schemes have been proposed to reduce the amount of computation and its hardware cost. the proposed algorithm called the EMPPM improves at least 22% of the noise margin compared with the MPPM algorithm. In addition, the proposed architecture can reduce the gate count by more than 60% of that used in the SAD algorithm without usig quantization schemes and 28% of the MPPM algorithm. The VHDL models have been simulated by using the CADANCETEX>$^{TM}$ and logic synthesis has been performed by using the SYNOPSYSTEX>$^{TM}$ with $0.6\mu\textrm{m}$ SOG(sea-of-gate) cell library. The implemented chip consists of 35,829 gates, operates at 100 MHz (worst case 53 MHz) and performs the template maching with the speed of 200 Mpixels/sec.

• 한국통신학회논문지
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• 제22권7호
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• pp.1515-1522
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• 1997

Several image coding algorithms have been developed for the telecommunication and multimedia systems with high image quality and high compression ratio. In order to achieve low entropy and distortion, the system should pay great cost of computation time and memory. In this paper, the uniform cubic lattice is chosen for Lattice Vector Quantization (LVQ) because of its generic simplicity. As a transform coding, the Discrete Wavelet Transform (DWT) is applied to the images because of its multiresolution property. The proposed algorithm is basically composed of the biorthogonal DWT and the uniform cubic LVQ. The multiresolution property of the DWT is actively used to optimize the entropy and the distortion on the basis of the distortion-rate function. The vector codebooks are also designed to be optimal at each subimage which is analyzed by the biorthogonal DWT. For compression efficiency, the vector codebook has different dimension depending on the variance of subimage. The simulation results show that the performance of the proposed coding mdthod is superior to the others in terms of the computation complexity and the PSNR in the range of entropy below 0.25 bpp.

• 한국컴퓨터정보학회논문지
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• 제7권2호
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• pp.155-160
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• 2002

일반 기업의 전산 업무 중 인사\ulcorner급여 관리 업무는 매우 중요하다. 인사.급여 관리 업무 중 사원에 대한 출퇴근 및 외입 \ulcorner외출 관리는 매우 중요한 데이터 요소이다. 일반 중소기업에서 전산 시스템 도입 에는 많은 비용이 들기 때문에 지금까지는 단순히 출근부에 의한 수 작업 데이터를 관리하였다. 한편, 이 비용문제를 해결하기 위해서 P.O.P단말기를 이용한 근태통신관리 시스템을 설계하고 구현하였다.

• Journal of information and communication convergence engineering
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• 제5권3호
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• pp.239-244
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• 2007

In the telematics system, a reasonable path search time should be guaranteed from a great number of user's queries, even though the optimal path with minimized travel time might be continuously changed by the traffic flows. Thus, the path search method should consider traffic flows of the roads and the search time as well. However, the existing path search methods are not able to cope efficiently with the change of the traffic flows and to search rapidly paths simultaneously. This paper proposes a new path search method for fast computation. It also reflects the traffic flows efficiently. Especially, in order to simplify the computation of variable heuristic values, it employs a simplification method for estimating values of traffic-adaptable heuristics. The experiments are carried out with the $A^*$ algorithm and the proposed method in terms of the execution time, the number of node accesses and the accuracy. The results obtained from the experiments show that the method achieves very fast execution time and the reasonable accuracy as well.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1998년도 하계학술대회 논문집 C
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• pp.1111-1113
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• 1998

A robust economic dispatch algorithm involving transmission losses is proposed and investigated for a possibility of on-line applications. In this paper, the penalty factors are calculated directly from transposed Jacobian of load flow analysis with advantages of superiority to B-coefficients method based on its computation time and suitability for real time application since the approach is based on a current system condition. The proposed algorithm is systematically handling the generation capacity constraints with transmission losses. Implementation of the algorithm for IEEE systems and EPRI Scenario systems shows that computation time is enough to apply on-line economic dispatch to large power system and production cost is saved compared with the crude classical economic dispatch algorithm without considering transmission losses.

• 한국정보통신학회논문지
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• 제9권8호
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• pp.1703-1708
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• 2005

본 논문은 블록 정합에 크게 기여하는 화소들만을 이용함으로 정합 계산량을 줄이는 변형된 블록 정합 알고리즘을 제안한다. 알고리즘 구현과 부가 정보를 고려하여 제안된 알고리즘은 정합 블록을 서브블록들로 나누고, 서브블록의 복잡도를 이용해 일부의 서브블록들만을 선택해 정합을 수행한다. 모의실험 결과는 제안된 알고리즘이 계산량을 줄이면서 유효한 정합을 수행하는 것을 보여준다.